Infineon TRAVEO T2G - 19.1.12 CH 11; 19.1.13 CH 12; 19.1.14 CH 13; 19.1.15 CH 14

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
PASS0_SAR0_CH10_TR_CTL
0x40900A80 FULL Trigger control.
PASS0_SAR0_CH10_SAMPLE_CTL
0x40900A84 FULL Sample control.
PASS0_SAR0_CH10_POST_CTL
0x40900A88 FULL Post processing control
PASS0_SAR0_CH10_RANGE_CTL
0x40900A8C FULL Range thresholds
PASS0_SAR0_CH10_INTR
0x40900A90 FULL Interrupt request register.
PASS0_SAR0_CH10_INTR_SET
0x40900A94 FULL Interrupt set request register
PASS0_SAR0_CH10_INTR_MASK
0x40900A98 FULL Interrupt mask register.
PASS0_SAR0_CH10_INTR_MASKED
0x40900A9C FULL Interrupt masked request register
PASS0_SAR0_CH10_WORK
0x40900AA0 FULL Working data register
PASS0_SAR0_CH10_RESULT
0x40900AA4 FULL Result data register
PASS0_SAR0_CH10_GRP_STAT
0x40900AA8 FULL Group status register
PASS0_SAR0_CH10_ENABLE
0x40900AB8 FULL Enable register
PASS0_SAR0_CH10_TR_CMD
0x40900ABC FULL Software triggers
19.1.12 CH 11
Register Name Address Permission Description
PASS0_SAR0_CH11_TR_CTL
0x40900AC0 FULL Trigger control.
PASS0_SAR0_CH11_SAMPLE_CTL
0x40900AC4 FULL Sample control.
PASS0_SAR0_CH11_POST_CTL
0x40900AC8 FULL Post processing control
PASS0_SAR0_CH11_RANGE_CTL
0x40900ACC FULL Range thresholds
PASS0_SAR0_CH11_INTR
0x40900AD0 FULL Interrupt request register.
PASS0_SAR0_CH11_INTR_SET
0x40900AD4 FULL Interrupt set request register
PASS0_SAR0_CH11_INTR_MASK
0x40900AD8 FULL Interrupt mask register.
PASS0_SAR0_CH11_INTR_MASKED
0x40900ADC FULL Interrupt masked request register
PASS0_SAR0_CH11_WORK
0x40900AE0 FULL Working data register
PASS0_SAR0_CH11_RESULT
0x40900AE4 FULL Result data register
PASS0_SAR0_CH11_GRP_STAT
0x40900AE8 FULL Group status register
PASS0_SAR0_CH11_ENABLE
0x40900AF8 FULL Enable register
PASS0_SAR0_CH11_TR_CMD
0x40900AFC FULL Software triggers
19.1.13 CH 12
Register Name Address Permission Description
PASS0_SAR0_CH12_TR_CTL
0x40900B00 FULL Trigger control.
PASS0_SAR0_CH12_SAMPLE_CTL
0x40900B04 FULL Sample control.
PASS0_SAR0_CH12_POST_CTL
0x40900B08 FULL Post processing control
PASS0_SAR0_CH12_RANGE_CTL
0x40900B0C FULL Range thresholds
PASS0_SAR0_CH12_INTR
0x40900B10 FULL Interrupt request register.
PASS0_SAR0_CH12_INTR_SET
0x40900B14 FULL Interrupt set request register
PASS0_SAR0_CH12_INTR_MASK
0x40900B18 FULL Interrupt mask register.
PASS0_SAR0_CH12_INTR_MASKED
0x40900B1C FULL Interrupt masked request register
PASS0_SAR0_CH12_WORK
0x40900B20 FULL Working data register
PASS0_SAR0_CH12_RESULT
0x40900B24 FULL Result data register
PASS0_SAR0_CH12_GRP_STAT
0x40900B28 FULL Group status register
PASS0_SAR0_CH12_ENABLE
0x40900B38 FULL Enable register
PASS0_SAR0_CH12_TR_CMD
0x40900B3C FULL Software triggers
19.1.14 CH 13
Register Name Address Permission Description
PASS0_SAR0_CH13_TR_CTL
0x40900B40 FULL Trigger control.
PASS0_SAR0_CH13_SAMPLE_CTL
0x40900B44 FULL Sample control.
PASS0_SAR0_CH13_POST_CTL
0x40900B48 FULL Post processing control
PASS0_SAR0_CH13_RANGE_CTL
0x40900B4C FULL Range thresholds
PASS0_SAR0_CH13_INTR
0x40900B50 FULL Interrupt request register.
PASS0_SAR0_CH13_INTR_SET
0x40900B54 FULL Interrupt set request register
PASS0_SAR0_CH13_INTR_MASK
0x40900B58 FULL Interrupt mask register.
PASS0_SAR0_CH13_INTR_MASKED
0x40900B5C FULL Interrupt masked request register
PASS0_SAR0_CH13_WORK
0x40900B60 FULL Working data register
PASS0_SAR0_CH13_RESULT
0x40900B64 FULL Result data register
PASS0_SAR0_CH13_GRP_STAT
0x40900B68 FULL Group status register
PASS0_SAR0_CH13_ENABLE
0x40900B78 FULL Enable register
PASS0_SAR0_CH13_TR_CMD
0x40900B7C FULL Software triggers
19.1.15 CH 14
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers