Infineon TRAVEO T2G - 12.12.9 EVTGEN_INTR

Technical Reference Manual 002-29852 Rev. *B
12.12.9 EVTGEN_INTR
Description:
Interrupt
Address:
0x403F0700
Offset:
0x700
Retention:
Not Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name COMP0 [7:0]
Bits 15 14 13 12 11 10 9 8
Name COMP0 [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:15 COMP0 RW1C RW1S 0 This interrupt cause field is activated (HW sets the field
to '1') when a comparator 0 event is generated (Active
counter 'counter_int[31:0]' becomes greater or equal to
COMP0.INT[31:0]).
904
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers