Infineon TRAVEO T2G - 19.5.1.16 PASS_SAR_STATUS

Technical Reference Manual 002-29852 Rev. *B
19.5.1.16 PASS_SAR_STATUS
Description:
Current status of internal SAR registers (mostly for debug)
Address:
0x40900200
Offset:
0x200
Retention:
Not Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:5] CUR_CHAN [4:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:14] CUR_PREEMPT_TYPE
[13:12]
None
[11:11]
CUR_PRIO [10:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name BUSY
[31:31]
PWRUP
_BUSY
[30:30]
DBG
_FREEZE
[29:29]
None [28:24]
Bit-fields
Bits
Name SW HW Default or
Enum
Description
0:4 CUR_CHAN R W 0 current channel being acquired, only valid if BUSY.
8:10 CUR_PRIO R W 0 priority of current group/channel, only valid if BUSY.
12:13 CUR_PREEMPT_TYPE R W 0 Preempting type of current group/channel, only valid if
BUSY.
29 DBG_FREEZE R W 0 If high then the SAR is prevented from starting a new
acquisition, see DBG_FREEZE_EN.
30 PWRUP_BUSY R W 0 If high then the SAR is waiting for PWRUP_TIME due
to IDLE_PWRDWN
31 BUSY R W 0 If high then the SAR is busy with a conversion.
1105
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers