Technical Reference Manual 002-29852 Rev. *B
15.25.7.11 GPIO_PRT_CFG
Description:
Port configuration register
Address:
0x40310044
Offset:
0x44
Retention:
Retained
IsDeepSleep:
No
Comment:
Configuration of drive mode and input buffer enable for each pin.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name IN_EN1
[7:7]
DRIVE_MODE1 [6:4] IN_EN0
[3:3]
DRIVE_MODE0 [2:0]
Bits 15 14 13 12 11 10 9 8
Name IN_EN3
[15:15]
DRIVE_MODE3 [14:12] IN_EN2
[11:11]
DRIVE_MODE2 [10:8]
Bits 23 22 21 20 19 18 17 16
Name IN_EN5
[23:23]
DRIVE_MODE5 [22:20] IN_EN4
[19:19]
DRIVE_MODE4 [18:16]
Bits 31 30 29 28 27 26 25 24
Name IN_EN7
[31:31]
DRIVE_MODE7 [30:28] IN_EN6
[27:27]
DRIVE_MODE6 [26:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:2 DRIVE_MODE0 RW R 0 The GPIO drive mode for IO pin 0. Resistive pull-up
and pull-down is selected in the drive mode.
Note: when initializing IO's that are connected to a live
bus (such as I2C), make sure the peripheral and
HSIOM (HSIOM_PRT_SELx) is properly configured
before turning the IO on here to avoid producing
glitches on the bus.
Note: that peripherals other than GPIO & UDB/DSI
directly control both the output and output-enable of
the output buffer (peripherals can drive strong 0 or
strong 1 in any mode except OFF='0').
Note: D_OUT, D_OUT_EN are pins of GPIO cell.
HIGHZ 0 Output buffer is off creating a high impedance input
D_OUT = '0': High Impedance
D_OUT = '1': High Impedance
RESERVED 1 N/A
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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