Infineon TRAVEO T2G - 4.13.6 CM4 CTI; 4.13.6.1 CM4_CM4 CTI_CTICONTROL

Technical Reference Manual 002-29852 Rev. *B
4.13.6 CM4CTI
4.13.6.1 CM4_CM4CTI_CTICONTROL
Description:
CTI Control Register
Address:
0xE0042000
Offset:
0x0
Retention:
Retained
IsDeepSleep:
No
Comment:
The CTI Control Register enables the CTI.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:1] GLBEN
[0:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0 GLBEN RW R 0 Enables or disables the ECT:
0 = disabled (reset)
1 = enabled.
When disabled, all cross triggering mapping logic
functionality is disabled for this processor.
483
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers