Infineon TRAVEO T2G - 14.2.5 FLASHC_FM_SRAM_ECC_CTL0

Technical Reference Manual 002-29852 Rev. *B
14.2.5 FLASHC_FM_SRAM_ECC_CTL0
Description:
eCT Flash SRAM ECC control 0
Address:
0x402402B0
Offset:
0x2B0
Retention:
Not Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name ECC_INJ_DATA [7:0]
Bits 15 14 13 12 11 10 9 8
Name ECC_INJ_DATA [15:8]
Bits 23 22 21 20 19 18 17 16
Name ECC_INJ_DATA [23:16]
Bits 31 30 29 28 27 26 25 24
Name ECC_INJ_DATA [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:31 ECC_INJ_DATA RW R 0 32-bit data for ECC error injection test of eCT Flash
SRAM ECC logic.
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2022-04-18
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