Infineon TRAVEO T2G - 9.3.13 DW_CRC_DATA_CTL

Technical Reference Manual 002-29852 Rev. *B
9.3.13 DW_CRC_DATA_CTL
Description:
CRC data control
Address:
0x40280110
Offset:
0x110
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name DATA_XOR [7:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:7 DATA_XOR RW R 0 Specifies a byte mask with which each data byte is
XOR'd. The XOR is performed before data reversal.
874
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers