Infineon TRAVEO T2G - 21.43 PPU_FX 26; 21.44 PPU_FX 27

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
PERI_MS_PPU_FX25_MS_ADDR
0x40010E60 PRIVILEGE
- WRITE
Master region, base address
PERI_MS_PPU_FX25_MS_SIZE
0x40010E64 PRIVILEGE
- WRITE
Master region, size
PERI_MS_PPU_FX25_MS_ATT0
0x40010E70 PRIVILEGE
- WRITE
Master attributes 0
PERI_MS_PPU_FX25_MS_ATT1
0x40010E74 PRIVILEGE
- WRITE
Master attributes 1
PERI_MS_PPU_FX25_MS_ATT2
0x40010E78 PRIVILEGE
- WRITE
Master attributes 2
PERI_MS_PPU_FX25_MS_ATT3
0x40010E7C PRIVILEGE
- WRITE
Master attributes 3
21.43 PPU_FX 26
Register Name Address Permission Description
PERI_MS_PPU_FX26_SL_ADDR
0x40010E80 PRIVILEGE
- WRITE
Slave region, base address
PERI_MS_PPU_FX26_SL_SIZE
0x40010E84 PRIVILEGE
- WRITE
Slave region, size
PERI_MS_PPU_FX26_SL_ATT0
0x40010E90 PRIVILEGE
- WRITE
Slave attributes 0
PERI_MS_PPU_FX26_SL_ATT1
0x40010E94 PRIVILEGE
- WRITE
Slave attributes 1
PERI_MS_PPU_FX26_SL_ATT2
0x40010E98 PRIVILEGE
- WRITE
Slave attributes 2
PERI_MS_PPU_FX26_SL_ATT3
0x40010E9C PRIVILEGE
- WRITE
Slave attributes 3
PERI_MS_PPU_FX26_MS_ADDR
0x40010EA0 PRIVILEGE
- WRITE
Master region, base address
PERI_MS_PPU_FX26_MS_SIZE
0x40010EA4 PRIVILEGE
- WRITE
Master region, size
PERI_MS_PPU_FX26_MS_ATT0
0x40010EB0 PRIVILEGE
- WRITE
Master attributes 0
PERI_MS_PPU_FX26_MS_ATT1
0x40010EB4 PRIVILEGE
- WRITE
Master attributes 1
PERI_MS_PPU_FX26_MS_ATT2
0x40010EB8 PRIVILEGE
- WRITE
Master attributes 2
PERI_MS_PPU_FX26_MS_ATT3
0x40010EBC PRIVILEGE
- WRITE
Master attributes 3
21.44 PPU_FX 27
Register Name Address Permission Description
PERI_MS_PPU_FX27_SL_ADDR
0x40010EC0 PRIVILEGE
- WRITE
Slave region, base address
PERI_MS_PPU_FX27_SL_SIZE
0x40010EC4 PRIVILEGE
- WRITE
Slave region, size
PERI_MS_PPU_FX27_SL_ATT0
0x40010ED0 PRIVILEGE
- WRITE
Slave attributes 0
PERI_MS_PPU_FX27_SL_ATT1
0x40010ED4 PRIVILEGE
- WRITE
Slave attributes 1
PERI_MS_PPU_FX27_SL_ATT2
0x40010ED8 PRIVILEGE
- WRITE
Slave attributes 2
PERI_MS_PPU_FX27_SL_ATT3
0x40010EDC PRIVILEGE
- WRITE
Slave attributes 3
PERI_MS_PPU_FX27_MS_ADDR
0x40010EE0 PRIVILEGE
- WRITE
Master region, base address
PERI_MS_PPU_FX27_MS_SIZE
0x40010EE4 PRIVILEGE
- WRITE
Master region, size
PERI_MS_PPU_FX27_MS_ATT0
0x40010EF0 PRIVILEGE
- WRITE
Master attributes 0
PERI_MS_PPU_FX27_MS_ATT1
0x40010EF4 PRIVILEGE
- WRITE
Master attributes 1
1166
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers