Infineon TRAVEO T2G - 23.9.47 SCB_INTR_TX_MASK

Technical Reference Manual 002-29852 Rev. *B
23.9.47 SCB_INTR_TX_MASK
Description:
Transmitter interrupt mask
Address:
0x40600F88
Offset:
0xF88
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name BLOCKED
[7:7]
UNDERFLOW
[6:6]
OVERFLOW
[5:5]
EMPTY
[4:4]
None [3:2] NOT_FULL
[1:1]
TRIGGER
[0:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:11] UART_ARB
_LOST
[10:10]
UART
_DONE
[9:9]
UART
_NACK
[8:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits
Name SW HW Default or
Enum
Description
0 TRIGGER RW R 0 Mask bit for corresponding bit in interrupt request
register.
1 NOT_FULL RW R 0 Mask bit for corresponding bit in interrupt request
register.
4 EMPTY RW R 0 Mask bit for corresponding bit in interrupt request
register.
5 OVERFLOW RW R 0 Mask bit for corresponding bit in interrupt request
register.
6 UNDERFLOW RW R 0 Mask bit for corresponding bit in interrupt request
register.
7 BLOCKED RW R 0 Mask bit for corresponding bit in interrupt request
register.
8 UART_NACK RW R 0 Mask bit for corresponding bit in interrupt request
register.
9 UART_DONE RW R 0 Mask bit for corresponding bit in interrupt request
register.
10 UART_ARB_LOST RW R 0 Mask bit for corresponding bit in interrupt request
register.
1448
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers