Infineon TRAVEO T2G - 9.1.1.89 CH_STRUCT 88; 9.1.1.90 CH_STRUCT 89; 9.1.1.91 CH_STRUCT 90; 9.1.1.92 CH_STRUCT 91

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
DW0_CH_STRUCT87_TR_CMD
0x402895E8 FULL Channel software trigger
9.1.1.89 CH_STRUCT 88
Register Name Address Permission Description
DW0_CH_STRUCT88_CH_CTL
0x40289600 FULL Channel control
DW0_CH_STRUCT88_CH_STATUS
0x40289604 FULL Channel status
DW0_CH_STRUCT88_CH_IDX
0x40289608 FULL Channel current indices
DW0_CH_STRUCT88_CH_CURR_PTR
0x4028960C FULL Channel current descriptor pointer
DW0_CH_STRUCT88_INTR
0x40289610 FULL Interrupt
DW0_CH_STRUCT88_INTR_SET
0x40289614 FULL Interrupt set
DW0_CH_STRUCT88_INTR_MASK
0x40289618 FULL Interrupt mask
DW0_CH_STRUCT88_INTR_MASKED
0x4028961C FULL Interrupt masked
DW0_CH_STRUCT88_SRAM_DATA0
0x40289620 FULL SRAM data 0
DW0_CH_STRUCT88_SRAM_DATA1
0x40289624 FULL SRAM data 1
DW0_CH_STRUCT88_TR_CMD
0x40289628 FULL Channel software trigger
9.1.1.90 CH_STRUCT 89
Register Name Address Permission Description
DW0_CH_STRUCT89_CH_CTL
0x40289640 FULL Channel control
DW0_CH_STRUCT89_CH_STATUS
0x40289644 FULL Channel status
DW0_CH_STRUCT89_CH_IDX
0x40289648 FULL Channel current indices
DW0_CH_STRUCT89_CH_CURR_PTR
0x4028964C FULL Channel current descriptor pointer
DW0_CH_STRUCT89_INTR
0x40289650 FULL Interrupt
DW0_CH_STRUCT89_INTR_SET
0x40289654 FULL Interrupt set
DW0_CH_STRUCT89_INTR_MASK
0x40289658 FULL Interrupt mask
DW0_CH_STRUCT89_INTR_MASKED
0x4028965C FULL Interrupt masked
DW0_CH_STRUCT89_SRAM_DATA0
0x40289660 FULL SRAM data 0
DW0_CH_STRUCT89_SRAM_DATA1
0x40289664 FULL SRAM data 1
DW0_CH_STRUCT89_TR_CMD
0x40289668 FULL Channel software trigger
9.1.1.91 CH_STRUCT 90
Register Name Address Permission Description
DW0_CH_STRUCT90_CH_CTL
0x40289680 FULL Channel control
DW0_CH_STRUCT90_CH_STATUS
0x40289684 FULL Channel status
DW0_CH_STRUCT90_CH_IDX
0x40289688 FULL Channel current indices
DW0_CH_STRUCT90_CH_CURR_PTR
0x4028968C FULL Channel current descriptor pointer
DW0_CH_STRUCT90_INTR
0x40289690 FULL Interrupt
DW0_CH_STRUCT90_INTR_SET
0x40289694 FULL Interrupt set
DW0_CH_STRUCT90_INTR_MASK
0x40289698 FULL Interrupt mask
DW0_CH_STRUCT90_INTR_MASKED
0x4028969C FULL Interrupt masked
DW0_CH_STRUCT90_SRAM_DATA0
0x402896A0 FULL SRAM data 0
DW0_CH_STRUCT90_SRAM_DATA1
0x402896A4 FULL SRAM data 1
DW0_CH_STRUCT90_TR_CMD
0x402896A8 FULL Channel software trigger
9.1.1.92 CH_STRUCT 91
Register Name Address Permission Description
DW0_CH_STRUCT91_CH_CTL
0x402896C0 FULL Channel control
DW0_CH_STRUCT91_CH_STATUS
0x402896C4 FULL Channel status
DW0_CH_STRUCT91_CH_IDX
0x402896C8 FULL Channel current indices
DW0_CH_STRUCT91_CH_CURR_PTR
0x402896CC FULL Channel current descriptor pointer
DW0_CH_STRUCT91_INTR
0x402896D0 FULL Interrupt
DW0_CH_STRUCT91_INTR_SET
0x402896D4 FULL Interrupt set
DW0_CH_STRUCT91_INTR_MASK
0x402896D8 FULL Interrupt mask
DW0_CH_STRUCT91_INTR_MASKED
0x402896DC FULL Interrupt masked
DW0_CH_STRUCT91_SRAM_DATA0
0x402896E0 FULL SRAM data 0
DW0_CH_STRUCT91_SRAM_DATA1
0x402896E4 FULL SRAM data 1
DW0_CH_STRUCT91_TR_CMD
0x402896E8 FULL Channel software trigger
9.2 DW 1
Description
Datawire Controller
Base Address
0x40290000
Size
0x10000
847
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