Infineon TRAVEO T2G - 7.5.3.8 CXPI_CH_RXPID_FI

Technical Reference Manual 002-29852 Rev. *B
7.5.3.8 CXPI_CH_RXPID_FI
Description:
RXPID and Frame Information
Address:
0x40518054
Offset:
0x54
Retention:
Not Retained
IsDeepSleep:
No
Comment:
This register holds information on RX's PID, Frame Information, and DLCEXT.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name PID [7:0]
Bits 15 14 13 12 11 10 9 8
Name FI [15:8]
Bits 23 22 21 20 19 18 17 16
Name DLCEXT [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:7 PID R RW Undefined Header protected identifier (PID).
- Bits 6 downto 0: frame identifier ID[6:0].
- Bits 7: is odd parity bit.
- PID[7] = ! (ID[6] ^ ID[5] ^ ID[4] ^ ID[3] ^ ID[2] ^ ID[1] ^
ID[0])
Reception: Received PID field. SW uses the PID field
to determine how to handle the response for a
received frame header: TX_RESPONSE or
RX_RESPONSE.
Note that, this field can be use by SW to check PType
byte as the HW handles both PID and PType the same
way. The frame type would occupy bit[6:0] and bit[7] is
the parity bit of the frame type. This parity bit is send
by the transmitting node.
8:15 FI R RW Undefined Frame Information.
This is the byte that is received as Frame Information.
Per CXPI spec,
FI[7:4] denotes the data length count (DLC).
FI[3:2] denotes Network Management. Bit[3] -
wakeup.ind Bit[2] - sleep.ind
FI[1:0] denotes CT.
16:23 DLCEXT R RW Undefined Data Length Count Extension.
This field is intended for payload of more than 12B.
This field is only valid if DLC=4'b1111 (FI[15:12]).
The value specified in this field will be the new payload
size. Valid values are 0-255.
781
2022-04-18
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