Infineon TRAVEO T2G - 28.4.1.1.11 TCPWM_GRP_CNT_LINE_SEL_BUFF

Technical Reference Manual 002-29852 Rev. *B
28.4.1.1.11 TCPWM_GRP_CNT_LINE_SEL_BUFF
Description:
Counter buffered line selection register
Address:
0x4038002C
Offset:
0x2C
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x32
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:7] COMPL_OUT_SEL [6:4] None [3:3] OUT_SEL [2:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:2 OUT_SEL RW RW 2 Buffer for LINE_SEL.OUT_SEL.
Can be exchanged with LINE_SEL.LINE_OUT_SEL
on a terminal count event with an actively pending
switch event.
This field has a function in PWM and PWM_PR modes
only.
4:6 COMPL_OUT_SEL RW RW 3 Buffer for LINE_SEL.COMPL.OUT_SEL.
Can be exchanged with
LINE_SEL.LINE_COMPL_OUT_SEL on a terminal
count event with an actively pending switch event.
This field has a function in PWM and PWM_PR modes
only.
1807
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers