Infineon TRAVEO T2G - 24.1.43 SFLASH_TOC2_SECURITY_UPDATES_MARKER

Technical Reference Manual 002-29852 Rev. *B
24.1.43 SFLASH_TOC2_SECURITY_UPDATES_MARKER
Description:
Marker for Security Updates
Address:
0x17007CFC
Offset:
0x7CFC
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name DATA32 [7:0]
Bits 15 14 13 12 11 10 9 8
Name DATA32 [15:8]
Bits 23 22 21 20 19 18 17 16
Name DATA32 [23:16]
Bits 31 30 29 28 27 26 25 24
Name DATA32 [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:31 DATA32 RW X This field is valid in flash boot version 3.1.0.556 and
later.
When marker is set to 0xFEDEEDDF the following
PPUs will be configured during boot:
- PERI_MS_PPU_FX_PERI_GR2_GROUP (Fixed
PPU) - read only for all PCs;
- Programmable PPU#11 configured to allow full
access for the following region 0x40201000 -
0x4020100C. The HSM may overwrite the default
configuration and reconfigure the PPU.
- Programmable PPU#12 configured to allow full
access for the CPUSS_ECC_CTL register
(0x402013C8). The HSM may overwrite the default
configuration and reconfigure the PPU.
- Programmable PPU#13 configured to allow full
access for the following region 0x40201300 -
0x402013C8. The HSM may overwrite the default
configuration and reconfigure the PPU.
1605
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers