Technical Reference Manual 002-29852 Rev. *B
15.25.7.14 GPIO_PRT_CFG_IN_AUTOLVL
Description:
Port input buffer AUTOLVL configuration register
Address:
0x40310058
Offset:
0x58
Retention:
Retained
IsDeepSleep:
No
Comment:
Configures the GPIO input buffer upper bit i.e. VTRIP_SEL[1] for each pin.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name VTRIP_SEL
7_1 [7:7]
VTRIP_SEL
6_1 [6:6]
VTRIP_SEL
5_1 [5:5]
VTRIP_SEL
4_1 [4:4]
VTRIP_SEL
3_1 [3:3]
VTRIP_SEL
2_1 [2:2]
VTRIP_SEL
1_1 [1:1]
VTRIP_SEL
0_1 [0:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0 VTRIP_SEL0_1 RW R 0 Configures the input buffer mode (trip points and
hysteresis) for GPIO upper bit. Lower bit is still
selected by CFG_IN.VTRIP_SEL0_0 field. This field is
used along with CFG_IN.VTRIP_SEL0_0 field as
below:
{CFG_IN_AUTOLVL.VTRIP_SEL0_1,CFG_IN.VTRIP_SEL0_0}:
0,0: CMOS
0,1: TTL
1,0: input buffer is compatible with automotive.
1,1: input buffer is compatible with automotvie
CMOS_OR_TTL 0 Input buffer compatible with CMOS/TTL interfaces as
described in CFG_IN.VTRIP_SEL0_0.
AUTO 1 Input buffer compatible with AUTO (elevated Vil)
interfaces when used along with
CFG_IN.VTRIP_SEL0_0.
1 VTRIP_SEL1_1 RW R 0 Input buffer compatible with automotive (elevated Vil)
interfaces.
2 VTRIP_SEL2_1 RW R 0 Input buffer compatible with automotive (elevated Vil)
interfaces.
3 VTRIP_SEL3_1 RW R 0 Input buffer compatible with automotive (elevated Vil)
interfaces.
4 VTRIP_SEL4_1 RW R 0 Input buffer compatible with automotive (elevated Vil)
interfaces.
5 VTRIP_SEL5_1 RW R 0 Input buffer compatible with automotive (elevated Vil)
interfaces.
6 VTRIP_SEL6_1 RW R 0 Input buffer compatible with automotive (elevated Vil)
interfaces.
7 VTRIP_SEL7_1 RW R 0 Input buffer compatible with automotive (elevated Vil)
interfaces.
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers