Technical Reference Manual 002-29852 Rev. *B
26.8.35 CLK_ECO_CONFIG2
Description:
ECO Configuration Register 2
Address:
0x40261544
Offset:
0x1544
Retention:
Retained
IsDeepSleep:
Yes
Comment:
Internal high speed oscillator configuration register for External-Crystal.
Default:
0x3
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name ATRIM [7:4] None [3:3] WDTRIM [2:0]
Bits 15 14 13 12 11 10 9 8
Name None
[15:15]
GTRIM [14:12] RTRIM [11:10] FTRIM [9:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:2 WDTRIM RW R 3 Watch Dog Trim. Sets the minimum oscillation
amplitude (Vp) for the crystal drive level. The minimum
amplitude detector output is readable in
CLK_ECO_STATUS.ECO_OK.
0x0: Vp > 0.05V
0x1: Vp > 0.10V
0x2: Vp > 0.15V
0x3: Vp > 0.20V
0x4: Vp > 0.25V
0x5: Vp > 0.30V
0x6: Vp > 0.35V
0x7: Vp > 0.40V
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers