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Infineon TRAVEO T2G - 18.13.3.8 LIN_CH_DATA1

Infineon TRAVEO T2G
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Technical Reference Manual 002-29852 Rev. *B
18.13.3.8 LIN_CH_DATA1
Description:
Response data 1
Address:
0x40508088
Offset:
0x88
Retention:
Retained
IsDeepSleep:
No
Comment:
This register supports 8-bit, 16-bit and 32-bit accesses. This allows for a single 32-bit access
to write or read four data fields.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name DATA5 [7:0]
Bits 15 14 13 12 11 10 9 8
Name DATA6 [15:8]
Bits 23 22 21 20 19 18 17 16
Name DATA7 [23:16]
Bits 31 30 29 28 27 26 25 24
Name DATA8 [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:7 DATA5 RW RW Undefined Data field 5.
8:15 DATA6 RW RW Undefined Data field 6.
16:23 DATA7 RW RW Undefined Data field 7.
24:31 DATA8 RW RW Undefined Data field 8.
1060
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers

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