Infineon TRAVEO T2G - 26.8.50 MCWDT; 26.8.50.1 MCWDT_CPU_SELECT

Technical Reference Manual 002-29852 Rev. *B
26.8.50 MCWDT
26.8.50.1 MCWDT_CPU_SELECT
Description:
MCWDT CPU selection register
Address:
0x40268040
Offset:
0x40
Retention:
Retained
IsDeepSleep:
Yes
Comment:
Assigns this MCWDT to a CPU.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:2] CPU_SEL [1:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:1 CPU_SEL RW R 0 Assigns this MCWDT to a CPU. This selects which
CPU SLEEPDEEP signal is used for
SLEEPDEEP_PAUSE.
1704
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers