Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
DMAC_CH2_TR_CMD
0x402A1228 FULL Channle software trigger
DMAC_CH2_DESCR_STATUS
0x402A1240 FULL Channel descriptor status
DMAC_CH2_DESCR_CTL
0x402A1260 FULL Channel descriptor control
DMAC_CH2_DESCR_SRC
0x402A1264 FULL Channel descriptor source
DMAC_CH2_DESCR_DST
0x402A1268 FULL Channel descriptor destination
DMAC_CH2_DESCR_X_SIZE
0x402A126C FULL Channel descriptor X size
DMAC_CH2_DESCR_X_INCR
0x402A1270 FULL Channel descriptor X increment
DMAC_CH2_DESCR_Y_SIZE
0x402A1274 FULL Channel descriptor Y size
DMAC_CH2_DESCR_Y_INCR
0x402A1278 FULL Channel descriptor Y increment
DMAC_CH2_DESCR_NEXT
0x402A127C FULL Channel descriptor next pointer
DMAC_CH2_INTR
0x402A1280 FULL Interrupt
DMAC_CH2_INTR_SET
0x402A1284 FULL Interrupt set
DMAC_CH2_INTR_MASK
0x402A1288 FULL Interrupt mask
DMAC_CH2_INTR_MASKED
0x402A128C FULL Interrupt masked
8.4 CH 3
Register Name Address Permission Description
DMAC_CH3_CTL
0x402A1300 FULL Channel control
DMAC_CH3_IDX
0x402A1310 FULL Channel current indices
DMAC_CH3_SRC
0x402A1314 FULL Channel current source address
DMAC_CH3_DST
0x402A1318 FULL Channel current destination address
DMAC_CH3_CURR
0x402A1320 FULL Channel current descriptor pointer
DMAC_CH3_TR_CMD
0x402A1328 FULL Channle software trigger
DMAC_CH3_DESCR_STATUS
0x402A1340 FULL Channel descriptor status
DMAC_CH3_DESCR_CTL
0x402A1360 FULL Channel descriptor control
DMAC_CH3_DESCR_SRC
0x402A1364 FULL Channel descriptor source
DMAC_CH3_DESCR_DST
0x402A1368 FULL Channel descriptor destination
DMAC_CH3_DESCR_X_SIZE
0x402A136C FULL Channel descriptor X size
DMAC_CH3_DESCR_X_INCR
0x402A1370 FULL Channel descriptor X increment
DMAC_CH3_DESCR_Y_SIZE
0x402A1374 FULL Channel descriptor Y size
DMAC_CH3_DESCR_Y_INCR
0x402A1378 FULL Channel descriptor Y increment
DMAC_CH3_DESCR_NEXT
0x402A137C FULL Channel descriptor next pointer
DMAC_CH3_INTR
0x402A1380 FULL Interrupt
DMAC_CH3_INTR_SET
0x402A1384 FULL Interrupt set
DMAC_CH3_INTR_MASK
0x402A1388 FULL Interrupt mask
DMAC_CH3_INTR_MASKED
0x402A138C FULL Interrupt masked
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers