Technical Reference Manual 002-29852 Rev. *B
25.6 Register Details
25.6.1 PRT
25.6.1.1 SMARTIO_PRT_CTL
Description:
Control register
Address:
0x40320000
Offset:
0x0
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x2001400
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name BYPASS [7:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:13] CLOCK_SRC [12:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name ENABLED
[31:31]
None [30:26] PIPELINE_
EN [25:25]
HLD_OVR
[24:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:7 BYPASS RW R Undefined Bypass of the programmable IO, one bit for each IO
pin: BYPASS[i] is for IO pin i. When ENABLED is '1',
this field is used. When ENABLED is '0', this field is
NOT used and SMARTIO fabric is always bypassed.
'0': No bypass (programmable SMARTIO fabric is
exposed).
'1': Bypass (programmable SMARTIOIO fabric is
hidden).
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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