Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
TCPWM0_GRP0_CNT16_INTR_SET
0x40380874 FULL Interrupt set request register
TCPWM0_GRP0_CNT16_INTR_MASK
0x40380878 FULL Interrupt mask register
TCPWM0_GRP0_CNT16_INTR_MASKED
0x4038087C FULL Interrupt masked request register
28.1.18 CNT 17
Register Name Address Permission Description
TCPWM0_GRP0_CNT17_CTRL
0x40380880 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP0_CNT17_STATUS
0x40380884 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP0_CNT17_COUNTER
0x40380888 FULL Counter count register
TCPWM0_GRP0_CNT17_CC0
0x40380890 FULL Counter compare/capture 0 register
TCPWM0_GRP0_CNT17_CC0_BUFF
0x40380894 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP0_CNT17_CC1
0x40380898 FULL Counter compare/capture 1 register
TCPWM0_GRP0_CNT17_CC1_BUFF
0x4038089C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP0_CNT17_PERIOD
0x403808A0 FULL Counter period register
TCPWM0_GRP0_CNT17_PERIOD_BUFF
0x403808A4 FULL Counter buffered period register
TCPWM0_GRP0_CNT17_DT
0x403808B0 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP0_CNT17_TR_CMD
0x403808C0 FULL Counter trigger command register
TCPWM0_GRP0_CNT17_TR_IN_SEL0
0x403808C4 FULL Counter input trigger selection register 0
TCPWM0_GRP0_CNT17_TR_IN_SEL1
0x403808C8 FULL Counter input trigger selection register 1
TCPWM0_GRP0_CNT17_TR_IN_EDGE_SEL
0x403808CC FULL Counter input trigger edge selection register
TCPWM0_GRP0_CNT17_TR_PWM_CTRL
0x403808D0 FULL Counter trigger PWM control register
TCPWM0_GRP0_CNT17_TR_OUT_SEL
0x403808D4 FULL Counter output trigger selection register
TCPWM0_GRP0_CNT17_INTR
0x403808F0 FULL Interrupt request register
TCPWM0_GRP0_CNT17_INTR_SET
0x403808F4 FULL Interrupt set request register
TCPWM0_GRP0_CNT17_INTR_MASK
0x403808F8 FULL Interrupt mask register
TCPWM0_GRP0_CNT17_INTR_MASKED
0x403808FC FULL Interrupt masked request register
28.1.19 CNT 18
Register Name Address Permission Description
TCPWM0_GRP0_CNT18_CTRL
0x40380900 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP0_CNT18_STATUS
0x40380904 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP0_CNT18_COUNTER
0x40380908 FULL Counter count register
TCPWM0_GRP0_CNT18_CC0
0x40380910 FULL Counter compare/capture 0 register
TCPWM0_GRP0_CNT18_CC0_BUFF
0x40380914 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP0_CNT18_CC1
0x40380918 FULL Counter compare/capture 1 register
TCPWM0_GRP0_CNT18_CC1_BUFF
0x4038091C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP0_CNT18_PERIOD
0x40380920 FULL Counter period register
TCPWM0_GRP0_CNT18_PERIOD_BUFF
0x40380924 FULL Counter buffered period register
TCPWM0_GRP0_CNT18_DT
0x40380930 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP0_CNT18_TR_CMD
0x40380940 FULL Counter trigger command register
TCPWM0_GRP0_CNT18_TR_IN_SEL0
0x40380944 FULL Counter input trigger selection register 0
TCPWM0_GRP0_CNT18_TR_IN_SEL1
0x40380948 FULL Counter input trigger selection register 1
TCPWM0_GRP0_CNT18_TR_IN_EDGE_SEL
0x4038094C FULL Counter input trigger edge selection register
TCPWM0_GRP0_CNT18_TR_PWM_CTRL
0x40380950 FULL Counter trigger PWM control register
TCPWM0_GRP0_CNT18_TR_OUT_SEL
0x40380954 FULL Counter output trigger selection register
TCPWM0_GRP0_CNT18_INTR
0x40380970 FULL Interrupt request register
TCPWM0_GRP0_CNT18_INTR_SET
0x40380974 FULL Interrupt set request register
TCPWM0_GRP0_CNT18_INTR_MASK
0x40380978 FULL Interrupt mask register
TCPWM0_GRP0_CNT18_INTR_MASKED
0x4038097C FULL Interrupt masked request register
28.1.20 CNT 19
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
To Next Page
Loading...
