Infineon TRAVEO T2G - 23.9.13 SCB_UART_FLOW_CTRL

Technical Reference Manual 002-29852 Rev. *B
23.9.13 SCB_UART_FLOW_CTRL
Description:
UART flow control
Address:
0x40600050
Offset:
0x50
Retention:
Retained
IsDeepSleep:
No
Comment:
UART flow control is a design time configuration parameter, which make the presence of this
MMIO register conditional to the configuration. The 'uart_rts_out' and 'uart_cts_in' are always
present on the IP interface. If flow control is configured out, 'uart_rts_out' is NOT connected,
and 'uart_cts_in' should be connected to '0'.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name TRIGGER_LEVEL [7:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:17] RTS
_POLAR
ITY [16:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:26] CTS
_ENABLED
[25:25]
CTS
_POLAR
ITY [24:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:7 TRIGGER_LEVEL RW R 0 Trigger level. When the receiver FIFO has less entries
than the amount of this field, a Ready To Send (RTS)
output signal is activated. By setting this field to '0',
flow control is effectively disabled (may be useful for
debug purposes).
16 RTS_POLARITY RW R 0 Polarity of the RTS output signal:
'0': RTS is active low;
'1': RTS is active high;
During SCB reset (Hibernate system power mode),
RTS output signal is '1'. This represents an inactive
state assuming an active low polarity.
24 CTS_POLARITY RW R 0 Polarity of the CTS input signal
'0': CTS is active low ;
'1': CTS is active high;
1404
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers