Infineon TRAVEO T2G - 12.12.4 EVTGEN_COUNTER_STATUS

Technical Reference Manual 002-29852 Rev. *B
12.12.4 EVTGEN_COUNTER_STATUS
Description:
Counter status
Address:
0x403F0010
Offset:
0x10
Retention:
Not Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name VALID
[31:31]
None [30:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
31 VALID R W 0 Active counter validity:
'0': Invalid.
'1': Valid.
The COUNTER register field INT32 is only valid when
VALID is '1'.
The COUNTER_STATUS and COUNTER registers
are non-retention registers; i.e. the
COUNTER_STATUS and COUNTER registers are
reset during DeepSleep power mode. After entering
the Active power mode, the Active counter is initialized
with the DeepSleep counter. This initialization may
take up to 1 clk_lf cycle.
898
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers