Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
PASS0_SAR2_CTL
0x40902000 FULL Analog control register.
PASS0_SAR2_DIAG_CTL
0x40902004 FULL Diagnostic Reference control register.
PASS0_SAR2_PRECOND_CTL
0x40902010 FULL Preconditioning control register.
PASS0_SAR2_ANA_CAL
0x40902080 FULL Current analog calibration values
PASS0_SAR2_DIG_CAL
0x40902084 FULL Current digital calibration values
PASS0_SAR2_ANA_CAL_ALT
0x40902090 FULL Alternate analog calibration values
PASS0_SAR2_DIG_CAL_ALT
0x40902094 FULL Alternate digital calibration values
PASS0_SAR2_CAL_UPD_CMD
0x40902098 FULL Calibration update command
PASS0_SAR2_TR_PEND
0x40902100 FULL Trigger pending status
PASS0_SAR2_WORK_VALID
0x40902180 FULL Channel working data register 'valid' bits
PASS0_SAR2_WORK_RANGE
0x40902184 FULL Range detected
PASS0_SAR2_WORK_RANGE_HI
0x40902188 FULL Range detect above Hi flag
PASS0_SAR2_WORK_PULSE
0x4090218C FULL Pulse detected
PASS0_SAR2_RESULT_VALID
0x409021A0 FULL Channel result data register 'valid' bits
PASS0_SAR2_RESULT_RANGE_HI
0x409021A4 FULL Channel Range above Hi flags
PASS0_SAR2_STATUS
0x40902200 FULL Current status of internal SAR registers (mostly for
debug)
PASS0_SAR2_AVG_STAT
0x40902204 FULL Current averaging status (for debug)
19.3.1 CH 0
Register Name Address Permission Description
PASS0_SAR2_CH0_TR_CTL
0x40902800 FULL Trigger control.
PASS0_SAR2_CH0_SAMPLE_CTL
0x40902804 FULL Sample control.
PASS0_SAR2_CH0_POST_CTL
0x40902808 FULL Post processing control
PASS0_SAR2_CH0_RANGE_CTL
0x4090280C FULL Range thresholds
PASS0_SAR2_CH0_INTR
0x40902810 FULL Interrupt request register.
PASS0_SAR2_CH0_INTR_SET
0x40902814 FULL Interrupt set request register
PASS0_SAR2_CH0_INTR_MASK
0x40902818 FULL Interrupt mask register.
PASS0_SAR2_CH0_INTR_MASKED
0x4090281C FULL Interrupt masked request register
PASS0_SAR2_CH0_WORK
0x40902820 FULL Working data register
PASS0_SAR2_CH0_RESULT
0x40902824 FULL Result data register
PASS0_SAR2_CH0_GRP_STAT
0x40902828 FULL Group status register
PASS0_SAR2_CH0_ENABLE
0x40902838 FULL Enable register
PASS0_SAR2_CH0_TR_CMD
0x4090283C FULL Software triggers
19.3.2 CH 1
Register Name
Address Permission Description
PASS0_SAR2_CH1_TR_CTL
0x40902840 FULL Trigger control.
PASS0_SAR2_CH1_SAMPLE_CTL
0x40902844 FULL Sample control.
PASS0_SAR2_CH1_POST_CTL
0x40902848 FULL Post processing control
PASS0_SAR2_CH1_RANGE_CTL
0x4090284C FULL Range thresholds
PASS0_SAR2_CH1_INTR
0x40902850 FULL Interrupt request register.
PASS0_SAR2_CH1_INTR_SET
0x40902854 FULL Interrupt set request register
PASS0_SAR2_CH1_INTR_MASK
0x40902858 FULL Interrupt mask register.
PASS0_SAR2_CH1_INTR_MASKED
0x4090285C FULL Interrupt masked request register
PASS0_SAR2_CH1_WORK
0x40902860 FULL Working data register
PASS0_SAR2_CH1_RESULT
0x40902864 FULL Result data register
PASS0_SAR2_CH1_GRP_STAT
0x40902868 FULL Group status register
PASS0_SAR2_CH1_ENABLE
0x40902878 FULL Enable register
PASS0_SAR2_CH1_TR_CMD
0x4090287C FULL Software triggers
19.3.3 CH 2
Register Name Address Permission Description
PASS0_SAR2_CH2_TR_CTL
0x40902880 FULL Trigger control.
PASS0_SAR2_CH2_SAMPLE_CTL
0x40902884 FULL Sample control.
PASS0_SAR2_CH2_POST_CTL
0x40902888 FULL Post processing control
PASS0_SAR2_CH2_RANGE_CTL
0x4090288C FULL Range thresholds
PASS0_SAR2_CH2_INTR
0x40902890 FULL Interrupt request register.
PASS0_SAR2_CH2_INTR_SET
0x40902894 FULL Interrupt set request register
PASS0_SAR2_CH2_INTR_MASK
0x40902898 FULL Interrupt mask register.
PASS0_SAR2_CH2_INTR_MASKED
0x4090289C FULL Interrupt masked request register
PASS0_SAR2_CH2_WORK
0x409028A0 FULL Working data register
PASS0_SAR2_CH2_RESULT
0x409028A4 FULL Result data register
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers