Infineon TRAVEO T2G - 2.3.9.6 M_TTCAN; 2.3.9.6.1 CANFD_CH_CREL

Technical Reference Manual 002-29852 Rev. *B
2.3.9.6 M_TTCAN
2.3.9.6.1 CANFD_CH_CREL
Description:
Core Release Register
Address:
0x40520000
Offset:
0x0
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name DAY [7:0]
Bits 15 14 13 12 11 10 9 8
Name MON [15:8]
Bits 23 22 21 20 19 18 17 16
Name SUBSTEP [23:20] YEAR [19:16]
Bits 31 30 29 28 27 26 25 24
Name REL [31:28] STEP [27:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:7 DAY R R 0 Time Stamp Day
Two digits, BCD-coded. This field is set by generic
parameter on M_TTCAN synthesis.
8:15 MON R R 0 Time Stamp Month
Two digits, BCD-coded. This field is set by generic
parameter on M_TTCAN synthesis.
16:19 YEAR R R 0 Time Stamp Year
One digit, BCD-coded. This field is set by generic
parameter on M_TTCAN synthesis.
20:23 SUBSTEP R R 0 Sub-step of Core Release
One digit, BCD-coded.
24:27 STEP R R 0 Step of Core Release
One digit, BCD-coded.
28:31 REL R R 0 Core Release
One digit, BCD-coded.
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers