Infineon TRAVEO T2G - 8.5.3.5 DMAC_CH_CURR

Technical Reference Manual 002-29852 Rev. *B
8.5.3.5 DMAC_CH_CURR
Description:
Channel current descriptor pointer
Address:
0x402A1020
Offset:
0x20
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [1:0]
Bits 15 14 13 12 11 10 9 8
Name PTR [15:8]
Bits 23 22 21 20 19 18 17 16
Name PTR [23:16]
Bits 31 30 29 28 27 26 25 24
Name PTR [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
2:31 PTR RW RW Undefined Address of current descriptor. When this field is '0',
there is no valid descriptor.
Note: HW updates the current descriptor pointer
CH_CURR_PTR with DESCR_NEXT_PTR after
execution of the current descriptor.
809
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers