Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
TCPWM0_GRP2_CNT4_CTRL
0x40390200 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP2_CNT4_STATUS
0x40390204 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP2_CNT4_COUNTER
0x40390208 FULL Counter count register
TCPWM0_GRP2_CNT4_CC0
0x40390210 FULL Counter compare/capture 0 register
TCPWM0_GRP2_CNT4_CC0_BUFF
0x40390214 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP2_CNT4_CC1
0x40390218 FULL Counter compare/capture 1 register
TCPWM0_GRP2_CNT4_CC1_BUFF
0x4039021C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP2_CNT4_PERIOD
0x40390220 FULL Counter period register
TCPWM0_GRP2_CNT4_PERIOD_BUFF
0x40390224 FULL Counter buffered period register
TCPWM0_GRP2_CNT4_DT
0x40390230 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP2_CNT4_TR_CMD
0x40390240 FULL Counter trigger command register
TCPWM0_GRP2_CNT4_TR_IN_SEL0
0x40390244 FULL Counter input trigger selection register 0
TCPWM0_GRP2_CNT4_TR_IN_SEL1
0x40390248 FULL Counter input trigger selection register 1
TCPWM0_GRP2_CNT4_TR_IN_EDGE_SEL
0x4039024C FULL Counter input trigger edge selection register
TCPWM0_GRP2_CNT4_TR_PWM_CTRL
0x40390250 FULL Counter trigger PWM control register
TCPWM0_GRP2_CNT4_TR_OUT_SEL
0x40390254 FULL Counter output trigger selection register
TCPWM0_GRP2_CNT4_INTR
0x40390270 FULL Interrupt request register
TCPWM0_GRP2_CNT4_INTR_SET
0x40390274 FULL Interrupt set request register
TCPWM0_GRP2_CNT4_INTR_MASK
0x40390278 FULL Interrupt mask register
TCPWM0_GRP2_CNT4_INTR_MASKED
0x4039027C FULL Interrupt masked request register
28.3.6 CNT 5
Register Name Address Permission Description
TCPWM0_GRP2_CNT5_CTRL
0x40390280 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP2_CNT5_STATUS
0x40390284 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP2_CNT5_COUNTER
0x40390288 FULL Counter count register
TCPWM0_GRP2_CNT5_CC0
0x40390290 FULL Counter compare/capture 0 register
TCPWM0_GRP2_CNT5_CC0_BUFF
0x40390294 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP2_CNT5_CC1
0x40390298 FULL Counter compare/capture 1 register
TCPWM0_GRP2_CNT5_CC1_BUFF
0x4039029C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP2_CNT5_PERIOD
0x403902A0 FULL Counter period register
TCPWM0_GRP2_CNT5_PERIOD_BUFF
0x403902A4 FULL Counter buffered period register
TCPWM0_GRP2_CNT5_DT
0x403902B0 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP2_CNT5_TR_CMD
0x403902C0 FULL Counter trigger command register
TCPWM0_GRP2_CNT5_TR_IN_SEL0
0x403902C4 FULL Counter input trigger selection register 0
TCPWM0_GRP2_CNT5_TR_IN_SEL1
0x403902C8 FULL Counter input trigger selection register 1
TCPWM0_GRP2_CNT5_TR_IN_EDGE_SEL
0x403902CC FULL Counter input trigger edge selection register
TCPWM0_GRP2_CNT5_TR_PWM_CTRL
0x403902D0 FULL Counter trigger PWM control register
TCPWM0_GRP2_CNT5_TR_OUT_SEL
0x403902D4 FULL Counter output trigger selection register
TCPWM0_GRP2_CNT5_INTR
0x403902F0 FULL Interrupt request register
TCPWM0_GRP2_CNT5_INTR_SET
0x403902F4 FULL Interrupt set request register
TCPWM0_GRP2_CNT5_INTR_MASK
0x403902F8 FULL Interrupt mask register
TCPWM0_GRP2_CNT5_INTR_MASKED
0x403902FC FULL Interrupt masked request register
28.3.7 CNT 6
Register Name Address Permission Description
TCPWM0_GRP2_CNT6_CTRL
0x40390300 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers