Infineon TRAVEO T2G - 28.3.3 CNT 2; 28.3.4 CNT 3; 28.3.5 CNT 4

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
TCPWM0_GRP2_CNT1_INTR_MASKED
0x403900FC FULL Interrupt masked request register
28.3.3 CNT 2
Register Name Address Permission Description
TCPWM0_GRP2_CNT2_CTRL
0x40390100 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP2_CNT2_STATUS
0x40390104 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP2_CNT2_COUNTER
0x40390108 FULL Counter count register
TCPWM0_GRP2_CNT2_CC0
0x40390110 FULL Counter compare/capture 0 register
TCPWM0_GRP2_CNT2_CC0_BUFF
0x40390114 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP2_CNT2_CC1
0x40390118 FULL Counter compare/capture 1 register
TCPWM0_GRP2_CNT2_CC1_BUFF
0x4039011C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP2_CNT2_PERIOD
0x40390120 FULL Counter period register
TCPWM0_GRP2_CNT2_PERIOD_BUFF
0x40390124 FULL Counter buffered period register
TCPWM0_GRP2_CNT2_DT
0x40390130 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP2_CNT2_TR_CMD
0x40390140 FULL Counter trigger command register
TCPWM0_GRP2_CNT2_TR_IN_SEL0
0x40390144 FULL Counter input trigger selection register 0
TCPWM0_GRP2_CNT2_TR_IN_SEL1
0x40390148 FULL Counter input trigger selection register 1
TCPWM0_GRP2_CNT2_TR_IN_EDGE_SEL
0x4039014C FULL Counter input trigger edge selection register
TCPWM0_GRP2_CNT2_TR_PWM_CTRL
0x40390150 FULL Counter trigger PWM control register
TCPWM0_GRP2_CNT2_TR_OUT_SEL
0x40390154 FULL Counter output trigger selection register
TCPWM0_GRP2_CNT2_INTR
0x40390170 FULL Interrupt request register
TCPWM0_GRP2_CNT2_INTR_SET
0x40390174 FULL Interrupt set request register
TCPWM0_GRP2_CNT2_INTR_MASK
0x40390178 FULL Interrupt mask register
TCPWM0_GRP2_CNT2_INTR_MASKED
0x4039017C FULL Interrupt masked request register
28.3.4 CNT 3
Register Name Address Permission Description
TCPWM0_GRP2_CNT3_CTRL
0x40390180 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP2_CNT3_STATUS
0x40390184 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP2_CNT3_COUNTER
0x40390188 FULL Counter count register
TCPWM0_GRP2_CNT3_CC0
0x40390190 FULL Counter compare/capture 0 register
TCPWM0_GRP2_CNT3_CC0_BUFF
0x40390194 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP2_CNT3_CC1
0x40390198 FULL Counter compare/capture 1 register
TCPWM0_GRP2_CNT3_CC1_BUFF
0x4039019C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP2_CNT3_PERIOD
0x403901A0 FULL Counter period register
TCPWM0_GRP2_CNT3_PERIOD_BUFF
0x403901A4 FULL Counter buffered period register
TCPWM0_GRP2_CNT3_DT
0x403901B0 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP2_CNT3_TR_CMD
0x403901C0 FULL Counter trigger command register
TCPWM0_GRP2_CNT3_TR_IN_SEL0
0x403901C4 FULL Counter input trigger selection register 0
TCPWM0_GRP2_CNT3_TR_IN_SEL1
0x403901C8 FULL Counter input trigger selection register 1
TCPWM0_GRP2_CNT3_TR_IN_EDGE_SEL
0x403901CC FULL Counter input trigger edge selection register
TCPWM0_GRP2_CNT3_TR_PWM_CTRL
0x403901D0 FULL Counter trigger PWM control register
TCPWM0_GRP2_CNT3_TR_OUT_SEL
0x403901D4 FULL Counter output trigger selection register
TCPWM0_GRP2_CNT3_INTR
0x403901F0 FULL Interrupt request register
TCPWM0_GRP2_CNT3_INTR_SET
0x403901F4 FULL Interrupt set request register
TCPWM0_GRP2_CNT3_INTR_MASK
0x403901F8 FULL Interrupt mask register
TCPWM0_GRP2_CNT3_INTR_MASKED
0x403901FC FULL Interrupt masked request register
28.3.5 CNT 4
1786
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers