Infineon TRAVEO T2G - 3.8.5.10 CM0 P_ROMTABLE_PID1

Technical Reference Manual 002-29852 Rev. *B
3.8.5.10 CM0P_ROMTABLE_PID1
Description:
Peripheral Identification Register 1.
Address:
0xF0000FE4
Offset:
0xFE4
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name JEPID_MIN [7:4] PN_MAJ [3:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:3 PN_MAJ R R Undefined JEP106 part number. 4 msbs of
CPUSS.PARTNUMBER parameter.
4:7 JEPID_MIN R R Undefined JEP106 vendor id. 4 lsbs of CPUSS.JEPID parameter.
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers