Infineon TRAVEO T2G - 19.5.1.5 PASS_SAR_DIG_CAL

Technical Reference Manual 002-29852 Rev. *B
19.5.1.5 PASS_SAR_DIG_CAL
Description:
Current digital calibration values
Address:
0x40900084
Offset:
0x84
Retention:
Retained
IsDeepSleep:
No
Comment:
Hardware can update this register if software sets the CAL_UPD_CMD.UPDATE
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name DOFFSET [7:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:12] DOFFSET [11:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:22] DGAIN [21:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:11 DOFFSET RW RW 0 Digital offset correction
Subtract DOFFSET from ADC output.
16:21 DGAIN RW RW 0 Digital gain correction.
Signed value to correct +/- 30 codes for the maximum
input voltage.
Corrected = (D - DOFFSET) + ( (D - DOFFSET) *
DGAIN + 0x800) / 0x1000
1094
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers