Infineon TRAVEO T2G - 28 TCPWM; 28.1 GRP 0; 28.1.1 CNT 0; 28.1.2 CNT 1

Technical Reference Manual 002-29852 Rev. *B
28 TCPWM
Description
Timer/Counter/PWM
Base Address
0x40380000
Size
0x20000
Slave Num
MMIO3 - 3
28.1 GRP 0
28.1.1 CNT 0
Register Name
Address Permission Description
TCPWM0_GRP0_CNT0_CTRL
0x40380000 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP0_CNT0_STATUS
0x40380004 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP0_CNT0_COUNTER
0x40380008 FULL Counter count register
TCPWM0_GRP0_CNT0_CC0
0x40380010 FULL Counter compare/capture 0 register
TCPWM0_GRP0_CNT0_CC0_BUFF
0x40380014 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP0_CNT0_CC1
0x40380018 FULL Counter compare/capture 1 register
TCPWM0_GRP0_CNT0_CC1_BUFF
0x4038001C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP0_CNT0_PERIOD
0x40380020 FULL Counter period register
TCPWM0_GRP0_CNT0_PERIOD_BUFF
0x40380024 FULL Counter buffered period register
TCPWM0_GRP0_CNT0_DT
0x40380030 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP0_CNT0_TR_CMD
0x40380040 FULL Counter trigger command register
TCPWM0_GRP0_CNT0_TR_IN_SEL0
0x40380044 FULL Counter input trigger selection register 0
TCPWM0_GRP0_CNT0_TR_IN_SEL1
0x40380048 FULL Counter input trigger selection register 1
TCPWM0_GRP0_CNT0_TR_IN_EDGE_SEL
0x4038004C FULL Counter input trigger edge selection register
TCPWM0_GRP0_CNT0_TR_PWM_CTRL
0x40380050 FULL Counter trigger PWM control register
TCPWM0_GRP0_CNT0_TR_OUT_SEL
0x40380054 FULL Counter output trigger selection register
TCPWM0_GRP0_CNT0_INTR
0x40380070 FULL Interrupt request register
TCPWM0_GRP0_CNT0_INTR_SET
0x40380074 FULL Interrupt set request register
TCPWM0_GRP0_CNT0_INTR_MASK
0x40380078 FULL Interrupt mask register
TCPWM0_GRP0_CNT0_INTR_MASKED
0x4038007C FULL Interrupt masked request register
28.1.2 CNT 1
Register Name Address Permission Description
TCPWM0_GRP0_CNT1_CTRL
0x40380080 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP0_CNT1_STATUS
0x40380084 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP0_CNT1_COUNTER
0x40380088 FULL Counter count register
TCPWM0_GRP0_CNT1_CC0
0x40380090 FULL Counter compare/capture 0 register
TCPWM0_GRP0_CNT1_CC0_BUFF
0x40380094 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP0_CNT1_CC1
0x40380098 FULL Counter compare/capture 1 register
TCPWM0_GRP0_CNT1_CC1_BUFF
0x4038009C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP0_CNT1_PERIOD
0x403800A0 FULL Counter period register
TCPWM0_GRP0_CNT1_PERIOD_BUFF
0x403800A4 FULL Counter buffered period register
TCPWM0_GRP0_CNT1_DT
0x403800B0 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP0_CNT1_TR_CMD
0x403800C0 FULL Counter trigger command register
TCPWM0_GRP0_CNT1_TR_IN_SEL0
0x403800C4 FULL Counter input trigger selection register 0
TCPWM0_GRP0_CNT1_TR_IN_SEL1
0x403800C8 FULL Counter input trigger selection register 1
TCPWM0_GRP0_CNT1_TR_IN_EDGE_SEL
0x403800CC FULL Counter input trigger edge selection register
TCPWM0_GRP0_CNT1_TR_PWM_CTRL
0x403800D0 FULL Counter trigger PWM control register
TCPWM0_GRP0_CNT1_TR_OUT_SEL
0x403800D4 FULL Counter output trigger selection register
1751
2022-04-18
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