Infineon TRAVEO T2G - 9.3.2 DW_STATUS

Technical Reference Manual 002-29852 Rev. *B
9.3.2 DW_STATUS
Description:
Status
Address:
0x40280004
Offset:
0x4
Retention:
Not Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name PC [7:4] None [3:3] B [2:2] NS [1:1] P [0:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:12] PREEMPTAB
LE [11:11]
None
[10:10]
PRIO [9:8]
Bits 23 22 21 20 19 18 17 16
Name CH_IDX [23:16]
Bits 31 30 29 28 27 26 25 24
Name ACTIVE
[31:31]
STATE [30:28] None [27:25] CH_IDX
[24:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0 P R RW Undefined Active channel, user/privileged access control:
'0': user mode.
'1': privileged mode.
1 NS R RW Undefined Active channel, secure/non-secure access control:
'0': secure.
'1': non-secure.
2 B R RW Undefined Active channel, non-bufferable/bufferable access
control:
'0': non-bufferable
'1': bufferable.
4:7 PC R RW Undefined Active channel protection context.
8:9 PRIO R W Undefined Active channel priority.
11 PREEMPTABLE R W Undefined Active channel preemptable.
16:24 CH_IDX R W Undefined Active channel index.
28:30 STATE R W 0 State of the DW controller.
'0': Default/inactive state.
'1': Loading descriptor.
'2': Loading data element from source location.
'3': Storing data element to destination location.
'4': CRC functionality (only used for CRC transfer
descriptor type).
'5': Update of active control information (e.g. source
and destination addresses) and wait for trigger de-
activation.
'6': Error.
31 ACTIVE R W 0 Active channel present:
'0': No.
'1': Yes.
860
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers