Infineon TRAVEO T2G - 21.13 PPU_PR 12; 21.14 PPU_PR 13; 21.15 PPU_PR 14; 21.16 PPU_PR 15

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
PERI_MS_PPU_PR11_MS_ATT0
0x400102F0 FULL Master attributes 0
PERI_MS_PPU_PR11_MS_ATT1
0x400102F4 FULL Master attributes 1
PERI_MS_PPU_PR11_MS_ATT2
0x400102F8 FULL Master attributes 2
PERI_MS_PPU_PR11_MS_ATT3
0x400102FC FULL Master attributes 3
21.13 PPU_PR 12
Register Name Address Permission Description
PERI_MS_PPU_PR12_SL_ADDR
0x40010300 FULL Slave region, base address
PERI_MS_PPU_PR12_SL_SIZE
0x40010304 FULL Slave region, size
PERI_MS_PPU_PR12_SL_ATT0
0x40010310 FULL Slave attributes 0
PERI_MS_PPU_PR12_SL_ATT1
0x40010314 FULL Slave attributes 1
PERI_MS_PPU_PR12_SL_ATT2
0x40010318 FULL Slave attributes 2
PERI_MS_PPU_PR12_SL_ATT3
0x4001031C FULL Slave attributes 3
PERI_MS_PPU_PR12_MS_ADDR
0x40010320 FULL Master region, base address
PERI_MS_PPU_PR12_MS_SIZE
0x40010324 FULL Master region, size
PERI_MS_PPU_PR12_MS_ATT0
0x40010330 FULL Master attributes 0
PERI_MS_PPU_PR12_MS_ATT1
0x40010334 FULL Master attributes 1
PERI_MS_PPU_PR12_MS_ATT2
0x40010338 FULL Master attributes 2
PERI_MS_PPU_PR12_MS_ATT3
0x4001033C FULL Master attributes 3
21.14 PPU_PR 13
Register Name Address Permission Description
PERI_MS_PPU_PR13_SL_ADDR
0x40010340 FULL Slave region, base address
PERI_MS_PPU_PR13_SL_SIZE
0x40010344 FULL Slave region, size
PERI_MS_PPU_PR13_SL_ATT0
0x40010350 FULL Slave attributes 0
PERI_MS_PPU_PR13_SL_ATT1
0x40010354 FULL Slave attributes 1
PERI_MS_PPU_PR13_SL_ATT2
0x40010358 FULL Slave attributes 2
PERI_MS_PPU_PR13_SL_ATT3
0x4001035C FULL Slave attributes 3
PERI_MS_PPU_PR13_MS_ADDR
0x40010360 FULL Master region, base address
PERI_MS_PPU_PR13_MS_SIZE
0x40010364 FULL Master region, size
PERI_MS_PPU_PR13_MS_ATT0
0x40010370 FULL Master attributes 0
PERI_MS_PPU_PR13_MS_ATT1
0x40010374 FULL Master attributes 1
PERI_MS_PPU_PR13_MS_ATT2
0x40010378 FULL Master attributes 2
PERI_MS_PPU_PR13_MS_ATT3
0x4001037C FULL Master attributes 3
21.15 PPU_PR 14
Register Name Address Permission Description
PERI_MS_PPU_PR14_SL_ADDR
0x40010380 FULL Slave region, base address
PERI_MS_PPU_PR14_SL_SIZE
0x40010384 FULL Slave region, size
PERI_MS_PPU_PR14_SL_ATT0
0x40010390 FULL Slave attributes 0
PERI_MS_PPU_PR14_SL_ATT1
0x40010394 FULL Slave attributes 1
PERI_MS_PPU_PR14_SL_ATT2
0x40010398 FULL Slave attributes 2
PERI_MS_PPU_PR14_SL_ATT3
0x4001039C FULL Slave attributes 3
PERI_MS_PPU_PR14_MS_ADDR
0x400103A0 FULL Master region, base address
PERI_MS_PPU_PR14_MS_SIZE
0x400103A4 FULL Master region, size
PERI_MS_PPU_PR14_MS_ATT0
0x400103B0 FULL Master attributes 0
PERI_MS_PPU_PR14_MS_ATT1
0x400103B4 FULL Master attributes 1
PERI_MS_PPU_PR14_MS_ATT2
0x400103B8 FULL Master attributes 2
PERI_MS_PPU_PR14_MS_ATT3
0x400103BC FULL Master attributes 3
21.16 PPU_PR 15
Register Name Address Permission Description
PERI_MS_PPU_PR15_SL_ADDR
0x400103C0 FULL Slave region, base address
PERI_MS_PPU_PR15_SL_SIZE
0x400103C4 FULL Slave region, size
PERI_MS_PPU_PR15_SL_ATT0
0x400103D0 FULL Slave attributes 0
PERI_MS_PPU_PR15_SL_ATT1
0x400103D4 FULL Slave attributes 1
PERI_MS_PPU_PR15_SL_ATT2
0x400103D8 FULL Slave attributes 2
PERI_MS_PPU_PR15_SL_ATT3
0x400103DC FULL Slave attributes 3
PERI_MS_PPU_PR15_MS_ADDR
0x400103E0 FULL Master region, base address
PERI_MS_PPU_PR15_MS_SIZE
0x400103E4 FULL Master region, size
PERI_MS_PPU_PR15_MS_ATT0
0x400103F0 FULL Master attributes 0
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers