Infineon TRAVEO T2G - 9.1.1.76 CH_STRUCT 75; 9.1.1.77 CH_STRUCT 76; 9.1.1.78 CH_STRUCT 77; 9.1.1.79 CH_STRUCT 78

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
DW0_CH_STRUCT74_CH_CURR_PTR
0x4028928C FULL Channel current descriptor pointer
DW0_CH_STRUCT74_INTR
0x40289290 FULL Interrupt
DW0_CH_STRUCT74_INTR_SET
0x40289294 FULL Interrupt set
DW0_CH_STRUCT74_INTR_MASK
0x40289298 FULL Interrupt mask
DW0_CH_STRUCT74_INTR_MASKED
0x4028929C FULL Interrupt masked
DW0_CH_STRUCT74_SRAM_DATA0
0x402892A0 FULL SRAM data 0
DW0_CH_STRUCT74_SRAM_DATA1
0x402892A4 FULL SRAM data 1
DW0_CH_STRUCT74_TR_CMD
0x402892A8 FULL Channel software trigger
9.1.1.76 CH_STRUCT 75
Register Name Address Permission Description
DW0_CH_STRUCT75_CH_CTL
0x402892C0 FULL Channel control
DW0_CH_STRUCT75_CH_STATUS
0x402892C4 FULL Channel status
DW0_CH_STRUCT75_CH_IDX
0x402892C8 FULL Channel current indices
DW0_CH_STRUCT75_CH_CURR_PTR
0x402892CC FULL Channel current descriptor pointer
DW0_CH_STRUCT75_INTR
0x402892D0 FULL Interrupt
DW0_CH_STRUCT75_INTR_SET
0x402892D4 FULL Interrupt set
DW0_CH_STRUCT75_INTR_MASK
0x402892D8 FULL Interrupt mask
DW0_CH_STRUCT75_INTR_MASKED
0x402892DC FULL Interrupt masked
DW0_CH_STRUCT75_SRAM_DATA0
0x402892E0 FULL SRAM data 0
DW0_CH_STRUCT75_SRAM_DATA1
0x402892E4 FULL SRAM data 1
DW0_CH_STRUCT75_TR_CMD
0x402892E8 FULL Channel software trigger
9.1.1.77 CH_STRUCT 76
Register Name Address Permission Description
DW0_CH_STRUCT76_CH_CTL
0x40289300 FULL Channel control
DW0_CH_STRUCT76_CH_STATUS
0x40289304 FULL Channel status
DW0_CH_STRUCT76_CH_IDX
0x40289308 FULL Channel current indices
DW0_CH_STRUCT76_CH_CURR_PTR
0x4028930C FULL Channel current descriptor pointer
DW0_CH_STRUCT76_INTR
0x40289310 FULL Interrupt
DW0_CH_STRUCT76_INTR_SET
0x40289314 FULL Interrupt set
DW0_CH_STRUCT76_INTR_MASK
0x40289318 FULL Interrupt mask
DW0_CH_STRUCT76_INTR_MASKED
0x4028931C FULL Interrupt masked
DW0_CH_STRUCT76_SRAM_DATA0
0x40289320 FULL SRAM data 0
DW0_CH_STRUCT76_SRAM_DATA1
0x40289324 FULL SRAM data 1
DW0_CH_STRUCT76_TR_CMD
0x40289328 FULL Channel software trigger
9.1.1.78 CH_STRUCT 77
Register Name Address Permission Description
DW0_CH_STRUCT77_CH_CTL
0x40289340 FULL Channel control
DW0_CH_STRUCT77_CH_STATUS
0x40289344 FULL Channel status
DW0_CH_STRUCT77_CH_IDX
0x40289348 FULL Channel current indices
DW0_CH_STRUCT77_CH_CURR_PTR
0x4028934C FULL Channel current descriptor pointer
DW0_CH_STRUCT77_INTR
0x40289350 FULL Interrupt
DW0_CH_STRUCT77_INTR_SET
0x40289354 FULL Interrupt set
DW0_CH_STRUCT77_INTR_MASK
0x40289358 FULL Interrupt mask
DW0_CH_STRUCT77_INTR_MASKED
0x4028935C FULL Interrupt masked
DW0_CH_STRUCT77_SRAM_DATA0
0x40289360 FULL SRAM data 0
DW0_CH_STRUCT77_SRAM_DATA1
0x40289364 FULL SRAM data 1
DW0_CH_STRUCT77_TR_CMD
0x40289368 FULL Channel software trigger
9.1.1.79 CH_STRUCT 78
Register Name Address Permission Description
DW0_CH_STRUCT78_CH_CTL
0x40289380 FULL Channel control
DW0_CH_STRUCT78_CH_STATUS
0x40289384 FULL Channel status
DW0_CH_STRUCT78_CH_IDX
0x40289388 FULL Channel current indices
DW0_CH_STRUCT78_CH_CURR_PTR
0x4028938C FULL Channel current descriptor pointer
DW0_CH_STRUCT78_INTR
0x40289390 FULL Interrupt
DW0_CH_STRUCT78_INTR_SET
0x40289394 FULL Interrupt set
DW0_CH_STRUCT78_INTR_MASK
0x40289398 FULL Interrupt mask
DW0_CH_STRUCT78_INTR_MASKED
0x4028939C FULL Interrupt masked
DW0_CH_STRUCT78_SRAM_DATA0
0x402893A0 FULL SRAM data 0
DW0_CH_STRUCT78_SRAM_DATA1
0x402893A4 FULL SRAM data 1
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