Infineon TRAVEO T2G - 19.5.1.18.13 PASS_SAR_CH_TR_CMD

Technical Reference Manual 002-29852 Rev. *B
19.5.1.18.13 PASS_SAR_CH_TR_CMD
Description:
Software triggers
Address:
0x4090083C
Offset:
0x3C
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:1] START
[0:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0 START RW1S A 0 Software start trigger. When written with '1', a start
trigger is generated which sets the corresponding
TR_PEND bit (only if the channel is enabled). A read
always returns a 0.
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers