Infineon TRAVEO T2G - 8.5.3.9 DMAC_CH_DESCR_SRC

Technical Reference Manual 002-29852 Rev. *B
8.5.3.9 DMAC_CH_DESCR_SRC
Description:
Channel descriptor source
Address:
0x402A1064
Offset:
0x64
Retention:
Not Retained
IsDeepSleep:
No
Comment:
Copy of DESCR_SRC of the currently active descriptor.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name ADDR [7:0]
Bits 15 14 13 12 11 10 9 8
Name ADDR [15:8]
Bits 23 22 21 20 19 18 17 16
Name ADDR [23:16]
Bits 31 30 29 28 27 26 25 24
Name ADDR [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:31 ADDR R W Undefined Base address of source location.
816
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