Infineon TRAVEO T2G - 23.9.37 SCB_INTR_M

Technical Reference Manual 002-29852 Rev. *B
23.9.37 SCB_INTR_M
Description:
Master interrupt request
Address:
0x40600F00
Offset:
0xF00
Retention:
Not Retained
IsDeepSleep:
No
Comment:
The register fields are not retained In DeepSleep power mode: HW clears the interrupt causes
to '0', when coming out of DeepSleep power mode. In addition, HW clears the interrupt causes
to '0', when the IP is disabled. As a result, the interrupt causes are only available in
Active/Sleep power modes; they are generated by internally clocked logic (this logic operates
on a clock that is only available in Active/Sleep power modes).
The interrupt causes should only be used for internally clocked operation; i.e. EC_OP is '0'.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:5] I2C_STOP
[4:4]
None [3:3] I2C_ACK
[2:2]
I2C_NACK
[1:1]
I2C_ARB_L
OST [0:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:10] SPI_DONE
[9:9]
I2C_BUS_E
RROR [8:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits
Name SW HW Default or
Enum
Description
0 I2C_ARB_LOST RW1C RW1S 0 I2C master lost arbitration: the value driven by the
master on the SDA line is not the same as the value
observed on the SDA line.
1 I2C_NACK RW1C RW1S 0 I2C master negative acknowledgement. Set to '1',
when the master receives a NACK (typically after the
master transmitted the slave address or TX data).
2 I2C_ACK RW1C RW1S 0 I2C master acknowledgement. Set to '1', when the
master receives a ACK (typically after the master
transmitted the slave address or TX data).
4 I2C_STOP RW1C RW1S 0 I2C master STOP. Set to '1', when the master has
transmitted a STOP.
8 I2C_BUS_ERROR RW1C RW1S 0 I2C master bus error (unexpected detection of START
or STOP condition).
9 SPI_DONE RW1C RW1S 0 SPI master transfer done event: all data frames in the
transmit FIFO are sent, the transmit FIFO is empty
(both TX FIFO and transmit shifter register are empty),
and SPI select output pin is deselected.
1435
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers