Infineon TRAVEO T2G - 12.12.7 EVTGEN_RATIO

Technical Reference Manual 002-29852 Rev. *B
12.12.7 EVTGEN_RATIO
Description:
Ratio
Address:
0x403F0024
Offset:
0x24
Retention:
Retained
IsDeepSleep:
No
Comment:
This register contains a ratio value expressing the relative frequency of the DeepSleep clock
clk_lf wrt. the Active clock clk_ref_div. Specifically, this registers contains the average number
of clk_ref_div cycles per clk_lf cycle.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:0]
Bits 15 14 13 12 11 10 9 8
Name FRAC8 [15:8]
Bits 23 22 21 20 19 18 17 16
Name INT16 [23:16]
Bits 31 30 29 28 27 26 25 24
Name INT16 [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
8:15 FRAC8 RW RW Undefined Fractional component of ratio value.
16:31 INT16 RW RW Undefined Integer component of ratio value.
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers