Infineon TRAVEO T2G - 8.5.3.11 DMAC_CH_DESCR_X_SIZE

Technical Reference Manual 002-29852 Rev. *B
8.5.3.11 DMAC_CH_DESCR_X_SIZE
Description:
Channel descriptor X size
Address:
0x402A106C
Offset:
0x6C
Retention:
Not Retained
IsDeepSleep:
No
Comment:
Copy of DESCR_X_SIZE of the currently active descriptor.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name X_COUNT [7:0]
Bits 15 14 13 12 11 10 9 8
Name X_COUNT [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:15 X_COUNT R W Undefined Number of iterations (minus 1) of the 'X loop'
(X_COUNT+1 is the number of single transfers in a 1D
transfer). This field is an unsigned number in the range
[0, 65535], representing 1 through 65536 iterations.
For the 'memory copy' descriptor type, (X_COUNT + 1)
is the number of transferred Bytes. For the 'scatter'
descriptor type, ceiling(X_COUNT/2) is the number of
(address, write data) initialization pairs processed.
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers