Infineon TRAVEO T2G - 2.1.3 CH 2; 2.1.3.1 M_TTCAN

Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
CANFD0_CH1_NDAT1
0x40520298 FULL New Data 1
CANFD0_CH1_NDAT2
0x4052029C FULL New Data 2
CANFD0_CH1_RXF0C
0x405202A0 FULL Rx FIFO 0 Configuration
CANFD0_CH1_RXF0S
0x405202A4 FULL Rx FIFO 0 Status
CANFD0_CH1_RXF0A
0x405202A8 FULL Rx FIFO 0 Acknowledge
CANFD0_CH1_RXBC
0x405202AC FULL Rx Buffer Configuration
CANFD0_CH1_RXF1C
0x405202B0 FULL Rx FIFO 1 Configuration
CANFD0_CH1_RXF1S
0x405202B4 FULL Rx FIFO 1 Status
CANFD0_CH1_RXF1A
0x405202B8 FULL Rx FIFO 1 Acknowledge
CANFD0_CH1_RXESC
0x405202BC FULL Rx Buffer / FIFO Element Size Configuration
CANFD0_CH1_TXBC
0x405202C0 FULL Tx Buffer Configuration
CANFD0_CH1_TXFQS
0x405202C4 FULL Tx FIFO/Queue Status
CANFD0_CH1_TXESC
0x405202C8 FULL Tx Buffer Element Size Configuration
CANFD0_CH1_TXBRP
0x405202CC FULL Tx Buffer Request Pending
CANFD0_CH1_TXBAR
0x405202D0 FULL Tx Buffer Add Request
CANFD0_CH1_TXBCR
0x405202D4 FULL Tx Buffer Cancellation Request
CANFD0_CH1_TXBTO
0x405202D8 FULL Tx Buffer Transmission Occurred
CANFD0_CH1_TXBCF
0x405202DC FULL Tx Buffer Cancellation Finished
CANFD0_CH1_TXBTIE
0x405202E0 FULL Tx Buffer Transmission Interrupt Enable
CANFD0_CH1_TXBCIE
0x405202E4 FULL Tx Buffer Cancellation Finished Interrupt Enable
CANFD0_CH1_TXEFC
0x405202F0 FULL Tx Event FIFO Configuration
CANFD0_CH1_TXEFS
0x405202F4 FULL Tx Event FIFO Status
CANFD0_CH1_TXEFA
0x405202F8 FULL Tx Event FIFO Acknowledge
CANFD0_CH1_TTTMC
0x40520300 FULL TT Trigger Memory Configuration
CANFD0_CH1_TTRMC
0x40520304 FULL TT Reference Message Configuration
CANFD0_CH1_TTOCF
0x40520308 FULL TT Operation Configuration
CANFD0_CH1_TTMLM
0x4052030C FULL TT Matrix Limits
CANFD0_CH1_TURCF
0x40520310 FULL TUR Configuration
CANFD0_CH1_TTOCN
0x40520314 FULL TT Operation Control
CANFD0_CH1_TTGTP
0x40520318 FULL TT Global Time Preset
CANFD0_CH1_TTTMK
0x4052031C FULL TT Time Mark
CANFD0_CH1_TTIR
0x40520320 FULL TT Interrupt Register
CANFD0_CH1_TTIE
0x40520324 FULL TT Interrupt Enable
CANFD0_CH1_TTILS
0x40520328 FULL TT Interrupt Line Select
CANFD0_CH1_TTOST
0x4052032C FULL TT Operation Status
CANFD0_CH1_TURNA
0x40520330 FULL TUR Numerator Actual
CANFD0_CH1_TTLGT
0x40520334 FULL TT Local & Global Time
CANFD0_CH1_TTCTC
0x40520338 FULL TT Cycle Time & Count
CANFD0_CH1_TTCPT
0x4052033C FULL TT Capture Time
CANFD0_CH1_TTCSM
0x40520340 FULL TT Cycle Sync Mark
2.1.3 CH 2
Register Name
Address Permission Description
CANFD0_CH2_RXFTOP_CTL
0x40520580 FULL Receive FIFO Top control
CANFD0_CH2_RXFTOP0_STAT
0x405205A0 FULL Receive FIFO 0 Top Status
CANFD0_CH2_RXFTOP0_DATA
0x405205A8 FULL Receive FIFO 0 Top Data
CANFD0_CH2_RXFTOP1_STAT
0x405205B0 FULL Receive FIFO 1 Top Status
CANFD0_CH2_RXFTOP1_DATA
0x405205B8 FULL Receive FIFO 1 Top Data
2.1.3.1 M_TTCAN
Register Name Address Permission Description
CANFD0_CH2_CREL
0x40520400 FULL Core Release Register
CANFD0_CH2_ENDN
0x40520404 FULL Endian Register
CANFD0_CH2_DBTP
0x4052040C FULL Data Bit Timing & Prescaler Register
CANFD0_CH2_TEST
0x40520410 FULL Test Register
CANFD0_CH2_RWD
0x40520414 FULL RAM Watchdog
CANFD0_CH2_CCCR
0x40520418 FULL CC Control Register
CANFD0_CH2_NBTP
0x4052041C FULL Nominal Bit Timing & Prescaler Register
CANFD0_CH2_TSCC
0x40520420 FULL Timestamp Counter Configuration
CANFD0_CH2_TSCV
0x40520424 FULL Timestamp Counter Value
CANFD0_CH2_TOCC
0x40520428 FULL Timeout Counter Configuration
CANFD0_CH2_TOCV
0x4052042C FULL Timeout Counter Value
CANFD0_CH2_ECR
0x40520440 FULL Error Counter Register
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers