Technical Reference Manual 002-29852 Rev. *B
2.3.9.6.16 CANFD_CH_IE
Description:
Interrupt Enable
Address:
0x40520054
Offset:
0x54
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name RF1LE [7:7] RF1FE [6:6] RF1WE
[5:5]
RF1NE
[4:4]
RF0LE [3:3] RF0FE [2:2] RF0WE
[1:1]
RF0NE
[0:0]
Bits 15 14 13 12 11 10 9 8
Name TEFLE
[15:15]
TEFFE
[14:14]
TEFWE
[13:13]
TEFNE
[12:12]
TFEE
[11:11]
TCFE
[10:10]
TCE [9:9] HPME [8:8]
Bits 23 22 21 20 19 18 17 16
Name EPE [23:23] ELOE
[22:22]
BEUE
[21:21]
BECE
[20:20]
DRXE
[19:19]
TOOE
[18:18]
MRAFE
[17:17]
TSWE
[16:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:30] ARAE
[29:29]
PEDE
[28:28]
PEAE
[27:27]
WDIE
[26:26]
BOE [25:25] EWE
[24:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0 RF0NE RW R 0 Rx FIFO 0 New Message Interrupt Enable
0= Interrupt Disabled
1= Interrupt Enabled
1 RF0WE RW R 0 Rx FIFO 0 Watermark Reached Interrupt Enable
0= Interrupt Disabled
1= Interrupt Enabled
2 RF0FE RW R 0 Rx FIFO 0 Full Interrupt Enable
0= Interrupt Disabled
1= Interrupt Enabled
3 RF0LE RW R 0 Rx FIFO 0 Message Lost Interrupt Enable
0= Interrupt Disabled
1= Interrupt Enabled
4 RF1NE RW R 0 Rx FIFO 1 New Message Interrupt Enable
0= Interrupt Disabled
1= Interrupt Enabled
5 RF1WE RW R 0 Rx FIFO 1 Watermark Reached Interrupt Enable
0= Interrupt Disabled
1= Interrupt Enabled
6 RF1FE RW R 0 Rx FIFO 1 Full Interrupt Enable
0= Interrupt Disabled
1= Interrupt Enabled
7 RF1LE RW R 0 Rx FIFO 1 Message Lost Interrupt Enable
0= Interrupt Disabled
1= Interrupt Enabled
8 HPME RW R 0 High Priority Message Interrupt Enable
0= Interrupt Disabled
1= Interrupt Enabled
9 TCE RW R 0 Transmission Completed Interrupt Enable
0= Interrupt Disabled
1= Interrupt Enabled
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers