Infineon TRAVEO T2G - 4.13.8.14 CM4_TRCCTI_ITCHINACK

Technical Reference Manual 002-29852 Rev. *B
4.13.8.14 CM4_TRCCTI_ITCHINACK
Description:
ITCHINACK Register
Address:
0xE0080EDC
Offset:
0xEDC
Retention:
Retained
IsDeepSleep:
No
Comment:
This register is a write-only register.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:4] CTCHINACK [3:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:3 CTCHINACK W R 0 Set the value of the CTCHINACK outputs
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers