Technical Reference Manual 002-29852 Rev. *B
2.3.9.6.41 CANFD_CH_TXBCF
Description:
Tx Buffer Cancellation Finished
Address:
0x405200DC
Offset:
0xDC
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name CF [7:0]
Bits 15 14 13 12 11 10 9 8
Name CF [15:8]
Bits 23 22 21 20 19 18 17 16
Name CF [23:16]
Bits 31 30 29 28 27 26 25 24
Name CF [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:31 CF R RW 0 Cancellation Finished
Each Tx Buffer has its own Cancellation Finished bit.
The bits are set when the corresponding
TXBRP bit is cleared after a cancellation was
requested via TXBCR. In case the corresponding
TXBRP bit was not set at the point of cancellation, CF
is set immediately. The bits are reset when a
new transmission is requested by writing a '1' to the
corresponding bit of register TXBAR.
0= No transmit buffer cancellation
1= Transmit buffer cancellation finished
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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