Infineon TRAVEO T2G - 9.3.5 DW_ACT_DESCR_DST

Technical Reference Manual 002-29852 Rev. *B
9.3.5 DW_ACT_DESCR_DST
Description:
Active descriptor destination
Address:
0x40280028
Offset:
0x28
Retention:
Not Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name DATA [7:0]
Bits 15 14 13 12 11 10 9 8
Name DATA [15:8]
Bits 23 22 21 20 19 18 17 16
Name DATA [23:16]
Bits 31 30 29 28 27 26 25 24
Name DATA [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:31 DATA R W Undefined Copy of DESCR_DST of the currently active
descriptor.
Base address of destination location.
Note: For a CRC transfer descriptor, this field should
be programmed with the address of the
CRC_LFSR_CTL register. The calculated CRC LFSR
state is written to this address (through the CRYPTO
AHB-Lite master interface) when the input trigger is
processed. The write transfer will be submitted to the
CPUSS and PERI protection schemes.
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers