Infineon TRAVEO T2G - 18.13.3.3 LIN_CH_STATUS

Technical Reference Manual 002-29852 Rev. *B
18.13.3.3 LIN_CH_STATUS
Description:
Status
Address:
0x40508008
Offset:
0x8
Retention:
Not Retained
IsDeepSleep:
No
Comment:
The register fields are not retained. This is to ensure that they come up as '0' after coming out
of DeepSleep system power mode.
This is a non-retained register; setting CTL.ENABLED to '0' clears all status fields to '0'.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:6] RX_DATA0
_FRAME
_ERROR
[5:5]
HEADER
_RE
SPONSE
[4:4]
DATA_IDX [3:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:14] RX_DONE
[13:13]
TX_DONE
[12:12]
None [11:10] RX_BUSY
[9:9]
TX_BUSY
[8:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:18] TX
_RESPON
SE_BIT
_ERROR
[17:17]
TX
_HEADER
_BIT
_ERROR
[16:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:29] RX
_RESPON
SE
_CHECKSU
M_ERROR
[28:28]
RX
_RESPON
SE_FRAME
_ERROR
[27:27]
RX
_HEADER
_PARITY
_ERROR
[26:26]
RX
_HEADER
_SYNC
_ERROR
[25:25]
RX
_HEADER
_FRAME
_ERROR
[24:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:3 DATA_IDX R W 0 Number of transferred data and checksum fields in the
response (also acts as an index/address into response
data field and checksum field registers (DATA0,
DATA1, PID_CHECKSUM)) :
'0': No data fields transferred.
'1': Data field 1 transferred.
...
'7': Data fields 1, 2, 3, ... and 7 transferred.
'8': Data fields 1, 2, 3, ... and 8 transferred.
'9': Data fields 1, 2, 3, ..., 8 and checksum field
transferred.
'10'-'15': Unused.
Set to '0' on the start of a TX_HEADER or
RX_HEADER command.
4 HEADER_RESPONSE R W 0 Frame header / response identifier (only valid when
TX_BUSY or RX_BUSY is '1'):
'0': Frame header being transferred.
'1': Frame response being transferred.
1050
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers