Infineon TRAVEO T2G - 1.1.11 BACKUP_INTR

Technical Reference Manual 002-29852 Rev. *B
1.1.11 BACKUP_INTR
Description:
Interrupt request register
Address:
0x4027002C
Offset:
0x2C
Retention:
Retained
IsDeepSleep:
No
Comment:
These bits are in vddbak domain. Interrupt signal from SRSS includes this register and also
BACKUP_INTR, if present.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:3] CENTURY
[2:2]
ALARM2
[1:1]
ALARM1
[0:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0 ALARM1 RW1C RW1S 0 Alarm 1 Interrupt
1 ALARM2 RW1C RW1S 0 Alarm 2 Interrupt
2 CENTURY RW1C RW1S 0 Century overflow interrupt
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers