Technical Reference Manual 002-29852 Rev. *B
13.5.1.10 FAULT_STRUCT_INTR
Description:
Interrupt
Address:
0x402100C0
Offset:
0xC0
Retention:
Not Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:1] FAULT [0:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0 FAULT RW1C RW1S 0 This interrupt cause field is activated (HW sets the field
to '1') when an enabled (MASK0/MASK1/MASK2)
pending fault source is captured:
- STATUS.VALID is set to '1'.
- STATUS.IDX specifies the fault source index.
- DATA0 through DATA3 captures the fault source
data.
SW writes a '1' to this field to clear the interrupt cause
to '0'. SW clear STATUS.VALID to '0' to enable
capture of the next fault. Note that when there is an
enabled pending fault source, the pending fault source
is captured immediately and INTR.FAULT is
immediately activated (set to '1').
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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