Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
DW0_CH_STRUCT15_TR_CMD
0x402883E8 FULL Channel software trigger
9.1.1.17 CH_STRUCT 16
Register Name Address Permission Description
DW0_CH_STRUCT16_CH_CTL
0x40288400 FULL Channel control
DW0_CH_STRUCT16_CH_STATUS
0x40288404 FULL Channel status
DW0_CH_STRUCT16_CH_IDX
0x40288408 FULL Channel current indices
DW0_CH_STRUCT16_CH_CURR_PTR
0x4028840C FULL Channel current descriptor pointer
DW0_CH_STRUCT16_INTR
0x40288410 FULL Interrupt
DW0_CH_STRUCT16_INTR_SET
0x40288414 FULL Interrupt set
DW0_CH_STRUCT16_INTR_MASK
0x40288418 FULL Interrupt mask
DW0_CH_STRUCT16_INTR_MASKED
0x4028841C FULL Interrupt masked
DW0_CH_STRUCT16_SRAM_DATA0
0x40288420 FULL SRAM data 0
DW0_CH_STRUCT16_SRAM_DATA1
0x40288424 FULL SRAM data 1
DW0_CH_STRUCT16_TR_CMD
0x40288428 FULL Channel software trigger
9.1.1.18 CH_STRUCT 17
Register Name Address Permission Description
DW0_CH_STRUCT17_CH_CTL
0x40288440 FULL Channel control
DW0_CH_STRUCT17_CH_STATUS
0x40288444 FULL Channel status
DW0_CH_STRUCT17_CH_IDX
0x40288448 FULL Channel current indices
DW0_CH_STRUCT17_CH_CURR_PTR
0x4028844C FULL Channel current descriptor pointer
DW0_CH_STRUCT17_INTR
0x40288450 FULL Interrupt
DW0_CH_STRUCT17_INTR_SET
0x40288454 FULL Interrupt set
DW0_CH_STRUCT17_INTR_MASK
0x40288458 FULL Interrupt mask
DW0_CH_STRUCT17_INTR_MASKED
0x4028845C FULL Interrupt masked
DW0_CH_STRUCT17_SRAM_DATA0
0x40288460 FULL SRAM data 0
DW0_CH_STRUCT17_SRAM_DATA1
0x40288464 FULL SRAM data 1
DW0_CH_STRUCT17_TR_CMD
0x40288468 FULL Channel software trigger
9.1.1.19 CH_STRUCT 18
Register Name Address Permission Description
DW0_CH_STRUCT18_CH_CTL
0x40288480 FULL Channel control
DW0_CH_STRUCT18_CH_STATUS
0x40288484 FULL Channel status
DW0_CH_STRUCT18_CH_IDX
0x40288488 FULL Channel current indices
DW0_CH_STRUCT18_CH_CURR_PTR
0x4028848C FULL Channel current descriptor pointer
DW0_CH_STRUCT18_INTR
0x40288490 FULL Interrupt
DW0_CH_STRUCT18_INTR_SET
0x40288494 FULL Interrupt set
DW0_CH_STRUCT18_INTR_MASK
0x40288498 FULL Interrupt mask
DW0_CH_STRUCT18_INTR_MASKED
0x4028849C FULL Interrupt masked
DW0_CH_STRUCT18_SRAM_DATA0
0x402884A0 FULL SRAM data 0
DW0_CH_STRUCT18_SRAM_DATA1
0x402884A4 FULL SRAM data 1
DW0_CH_STRUCT18_TR_CMD
0x402884A8 FULL Channel software trigger
9.1.1.20 CH_STRUCT 19
Register Name Address Permission Description
DW0_CH_STRUCT19_CH_CTL
0x402884C0 FULL Channel control
DW0_CH_STRUCT19_CH_STATUS
0x402884C4 FULL Channel status
DW0_CH_STRUCT19_CH_IDX
0x402884C8 FULL Channel current indices
DW0_CH_STRUCT19_CH_CURR_PTR
0x402884CC FULL Channel current descriptor pointer
DW0_CH_STRUCT19_INTR
0x402884D0 FULL Interrupt
DW0_CH_STRUCT19_INTR_SET
0x402884D4 FULL Interrupt set
DW0_CH_STRUCT19_INTR_MASK
0x402884D8 FULL Interrupt mask
DW0_CH_STRUCT19_INTR_MASKED
0x402884DC FULL Interrupt masked
DW0_CH_STRUCT19_SRAM_DATA0
0x402884E0 FULL SRAM data 0
DW0_CH_STRUCT19_SRAM_DATA1
0x402884E4 FULL SRAM data 1
DW0_CH_STRUCT19_TR_CMD
0x402884E8 FULL Channel software trigger
9.1.1.21 CH_STRUCT 20
Register Name Address Permission Description
DW0_CH_STRUCT20_CH_CTL
0x40288500 FULL Channel control
DW0_CH_STRUCT20_CH_STATUS
0x40288504 FULL Channel status
DW0_CH_STRUCT20_CH_IDX
0x40288508 FULL Channel current indices
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers