Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
LIN0_CH7_CTL0
0x40508700 FULL Control 0
LIN0_CH7_CTL1
0x40508704 FULL Control 1
LIN0_CH7_STATUS
0x40508708 FULL Status
LIN0_CH7_CMD
0x40508710 FULL Command
LIN0_CH7_TX_RX_STATUS
0x40508760 FULL TX/RX status
LIN0_CH7_PID_CHECKSUM
0x40508780 FULL PID and checksum
LIN0_CH7_DATA0
0x40508784 FULL Response data 0
LIN0_CH7_DATA1
0x40508788 FULL Response data 1
LIN0_CH7_INTR
0x405087C0 FULL Interrupt
LIN0_CH7_INTR_SET
0x405087C4 FULL Interrupt set
LIN0_CH7_INTR_MASK
0x405087C8 FULL Interrupt mask
LIN0_CH7_INTR_MASKED
0x405087CC FULL Interrupt masked
18.9 CH 8
This instance is not available in the following part numbers:
CYT2BL3BAS, CYT2BL3BAE, CYT2BL3CAS, CYT2BL3CAE.
Register Name Address Permission Description
LIN0_CH8_CTL0
0x40508800 FULL Control 0
LIN0_CH8_CTL1
0x40508804 FULL Control 1
LIN0_CH8_STATUS
0x40508808 FULL Status
LIN0_CH8_CMD
0x40508810 FULL Command
LIN0_CH8_TX_RX_STATUS
0x40508860 FULL TX/RX status
LIN0_CH8_PID_CHECKSUM
0x40508880 FULL PID and checksum
LIN0_CH8_DATA0
0x40508884 FULL Response data 0
LIN0_CH8_DATA1
0x40508888 FULL Response data 1
LIN0_CH8_INTR
0x405088C0 FULL Interrupt
LIN0_CH8_INTR_SET
0x405088C4 FULL Interrupt set
LIN0_CH8_INTR_MASK
0x405088C8 FULL Interrupt mask
LIN0_CH8_INTR_MASKED
0x405088CC FULL Interrupt masked
18.10 CH 9
Register Name
Address Permission Description
LIN0_CH9_CTL0
0x40508900 FULL Control 0
LIN0_CH9_CTL1
0x40508904 FULL Control 1
LIN0_CH9_STATUS
0x40508908 FULL Status
LIN0_CH9_CMD
0x40508910 FULL Command
LIN0_CH9_TX_RX_STATUS
0x40508960 FULL TX/RX status
LIN0_CH9_PID_CHECKSUM
0x40508980 FULL PID and checksum
LIN0_CH9_DATA0
0x40508984 FULL Response data 0
LIN0_CH9_DATA1
0x40508988 FULL Response data 1
LIN0_CH9_INTR
0x405089C0 FULL Interrupt
LIN0_CH9_INTR_SET
0x405089C4 FULL Interrupt set
LIN0_CH9_INTR_MASK
0x405089C8 FULL Interrupt mask
LIN0_CH9_INTR_MASKED
0x405089CC FULL Interrupt masked
18.11 CH 10
This instance is not available in the following part numbers:
CYT2BL3BAS, CYT2BL3BAE, CYT2BL3CAS, CYT2BL3CAE, CYT2BL4BAS, CYT2BL4BAE, CYT2BL4CAS, CYT2BL4CAE,
CYT2BL5BAS, CYT2BL5BAE, CYT2BL5CAS, CYT2BL5CAE.
Register Name Address Permission Description
LIN0_CH10_CTL0
0x40508A00 FULL Control 0
LIN0_CH10_CTL1
0x40508A04 FULL Control 1
LIN0_CH10_STATUS
0x40508A08 FULL Status
LIN0_CH10_CMD
0x40508A10 FULL Command
LIN0_CH10_TX_RX_STATUS
0x40508A60 FULL TX/RX status
LIN0_CH10_PID_CHECKSUM
0x40508A80 FULL PID and checksum
LIN0_CH10_DATA0
0x40508A84 FULL Response data 0
LIN0_CH10_DATA1
0x40508A88 FULL Response data 1
LIN0_CH10_INTR
0x40508AC0 FULL Interrupt
LIN0_CH10_INTR_SET
0x40508AC4 FULL Interrupt set
LIN0_CH10_INTR_MASK
0x40508AC8 FULL Interrupt mask
LIN0_CH10_INTR_MASKED
0x40508ACC FULL Interrupt masked
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers