Infineon TRAVEO T2G - 9 DW; 9.1 DW 0; 9.1.1 0; 9.1.1.1 CH_STRUCT 0

Technical Reference Manual 002-29852 Rev. *B
9 DW
9.1 DW 0
Description
Datawire Controller
Base Address
0x40280000
Size
0x10000
Slave Num
MMIO2 - 7
9.1.1 0
Register Name
Address Permission Description
DW0_CTL0
0x40280000 FULL Control
DW0_STATUS0
0x40280004 FULL Status
DW0_ACT_DESCR_CTL0
0x40280020 FULL Active descriptor control
DW0_ACT_DESCR_SRC0
0x40280024 FULL Active descriptor source
DW0_ACT_DESCR_DST0
0x40280028 FULL Active descriptor destination
DW0_ACT_DESCR_X_CTL0
0x40280030 FULL Active descriptor X loop control
DW0_ACT_DESCR_Y_CTL0
0x40280034 FULL Active descriptor Y loop control
DW0_ACT_DESCR_NEXT_PTR0
0x40280038 FULL Active descriptor next pointer
DW0_ACT_SRC0
0x40280040 FULL Active source
DW0_ACT_DST0
0x40280044 FULL Active destination
DW0_ECC_CTL0
0x40280080 FULL ECC control
DW0_CRC_CTL0
0x40280100 FULL CRC control
DW0_CRC_DATA_CTL0
0x40280110 FULL CRC data control
DW0_CRC_POL_CTL0
0x40280120 FULL CRC polynomial control
DW0_CRC_LFSR_CTL0
0x40280130 FULL CRC LFSR control
DW0_CRC_REM_CTL0
0x40280140 FULL CRC remainder control
DW0_CRC_REM_RESULT0
0x40280148 FULL CRC remainder result
9.1.1.1 CH_STRUCT 0
Register Name Address Permission Description
DW0_CH_STRUCT0_CH_CTL
0x40288000 FULL Channel control
DW0_CH_STRUCT0_CH_STATUS
0x40288004 FULL Channel status
DW0_CH_STRUCT0_CH_IDX
0x40288008 FULL Channel current indices
DW0_CH_STRUCT0_CH_CURR_PTR
0x4028800C FULL Channel current descriptor pointer
DW0_CH_STRUCT0_INTR
0x40288010 FULL Interrupt
DW0_CH_STRUCT0_INTR_SET
0x40288014 FULL Interrupt set
DW0_CH_STRUCT0_INTR_MASK
0x40288018 FULL Interrupt mask
DW0_CH_STRUCT0_INTR_MASKED
0x4028801C FULL Interrupt masked
DW0_CH_STRUCT0_SRAM_DATA0
0x40288020 FULL SRAM data 0
DW0_CH_STRUCT0_SRAM_DATA1
0x40288024 FULL SRAM data 1
DW0_CH_STRUCT0_TR_CMD
0x40288028 FULL Channel software trigger
9.1.1.2 CH_STRUCT 1
Register Name Address Permission Description
DW0_CH_STRUCT1_CH_CTL
0x40288040 FULL Channel control
DW0_CH_STRUCT1_CH_STATUS
0x40288044 FULL Channel status
DW0_CH_STRUCT1_CH_IDX
0x40288048 FULL Channel current indices
DW0_CH_STRUCT1_CH_CURR_PTR
0x4028804C FULL Channel current descriptor pointer
DW0_CH_STRUCT1_INTR
0x40288050 FULL Interrupt
DW0_CH_STRUCT1_INTR_SET
0x40288054 FULL Interrupt set
DW0_CH_STRUCT1_INTR_MASK
0x40288058 FULL Interrupt mask
DW0_CH_STRUCT1_INTR_MASKED
0x4028805C FULL Interrupt masked
DW0_CH_STRUCT1_SRAM_DATA0
0x40288060 FULL SRAM data 0
DW0_CH_STRUCT1_SRAM_DATA1
0x40288064 FULL SRAM data 1
DW0_CH_STRUCT1_TR_CMD
0x40288068 FULL Channel software trigger
9.1.1.3 CH_STRUCT 2
Register Name Address Permission Description
DW0_CH_STRUCT2_CH_CTL
0x40288080 FULL Channel control
DW0_CH_STRUCT2_CH_STATUS
0x40288084 FULL Channel status
DW0_CH_STRUCT2_CH_IDX
0x40288088 FULL Channel current indices
827
2022-04-18
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