Technical Reference Manual 002-29852 Rev. *B
Bits Name SW HW Default or
Enum
Description
16:19 BREAK_WIDTH RW R 10 Break width. BREAK_WIDTH + 1 is the minimum width
in bit periods of a break. During a break the
transmitted/received line value is '0'. This feature is
useful for standard UART submode and LIN submode
('break field' detection). Once, the break is detected,
the INTR_RX.BREAK_DETECT bit is set to '1'. Note
that break detection precedes baud rate detection,
which is used to synchronize/refine the receiver clock
to the transmitter clock. As a result, break detection
operates with an unsynchronized/unrefined receiver
clock. Therefore, the receiver's definition of a bit period
is imprecise and the setting of this field should take
this imprecision into account. The LIN standard also
accounts for this imprecision: a LIN start bit followed
by 8 data bits allows for up to 9 consecutive '0' bit
periods during regular transmission, whereas the LIN
break detection should be at least 13 consecutive '0'
bit periods. This provides for a margin of 4 bit periods.
Therefore, the default value of this field is set to 10,
representing a minimal break field with of 10+1 = 11 bit
periods; a value in between the 9 consecutive bit
periods of a regular transmission and the 13
consecutive bit periods of a break field. This provides
for slight imprecisions of the receiver clock wrt. the
transmitter clock. There should not be a need to
program this field to any value other than its default
value.
24 BREAK_LEVEL RW R 0 0: low level pulse detection, like Break field in LIN
protocol
1: high level pulse detection, like IFS field in CXPI
protocol, or idle line state in UART
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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